MOTOROLA
10-36
MAIN TIMER AND REAL-TIME INTERRUPT
M68HC11
REFERENCE MANUAL
the other hand, if the outputs control unrelated devices, it might be more practical to
use separate output-compare channels for each output.
A side benefit to using OC1 to control several timer outputs is that the other output-
compare functions associated with these pins become available for general-purpose
software timing functions that do not directly control pins.
10.4.2.2 Two Output Compares Controlling One Pin
OC1 can also be used in conjunction with one or more other output compares to
achieve even more timing flexibility. OC1 can control a timer output even when one of
the other output compares is already controlling the same pin, which allows the pro-
grammer to schedule two succeeding edges of each output signal at a time. This ca-
pability reduces software overhead because only one of the two output compares
needs to generate an interrupt. Pulses as short as one E cycle, which are accurately
positioned with one-cycle resolution (500-ns resolution), can be generated.
Example 10–6 uses OC1, OC2, and OC3 together to produce two PWM outputs. This
particular program can produce active-high PWM signals with a minimum period of
200 cycles (100
μ
s or 10 kHz) and a duty cycle of 0 to 100 percent. Actually, the pro-
gram only produces duty cycles of 50 to 100 percent. When a smaller duty cycle is
specified, it is automatically changed to 100 percent minus the specified duty cycle,
and the polarity of the output is switched. (A 30-percent active-high duty cycle is the
same as a 70-percent active-low duty cycle.)
Figure 10-12
shows the important parts
of the program for Example 10–6.
Before running this example program on the EVB board, the period and duty cycle are
established manually with memory modify commands. Period is set indirectly by set-
ting the location PWMP1P at $D002. This value is one percent of the period (in cycles);
thus, a value of $02 sets the period to 200 cycles. When the program starts, this value
is multiplied by 100 and stored to location PWMPER. Program latencies are such that
a period of 100 cycles (PWMP1P = $01) is too short, and the program will not operate
correctly. Duty cycles are stored as percentages at locations PWMDC1 and PWMDC2
($D003 and $D004, respectively; $64 = 100 percent).