MOTOROLA
6-4
CENTRAL PROCESSING UNIT
M68HC11
REFERENCE MANUAL
mer does not normally have to be concerned about the stack other than to be sure that
it is pointing at usable random-access memory (RAM) and that there is sufficient
space. To assure sufficient space, the user would need to know the maximum depth
of subroutine or interrupt nesting possible in the particular application.
There are a few less common uses for the stack. The stack can be used to pass pa-
rameters to a subprogram, which is fairly common in high-level language compilers
but is often overlooked by assembly-language programmers. There are two advantag-
es of this technique over specific assignment of temporary or variable locations. First,
the memory locations are only needed for the time the subprogram is being executed;
they can be used for something else when the subprogram is completed. Second, this
feature makes the subprogram re-entrant so that an interrupting program could call the
same subprogram with a different set of values without disturbing the interrupted use
of the subprogram.
In unusual cases, a programmer may want to look at or even manipulate something
that is on the stack, which should only be attempted by an experienced programmer
because it requires a detailed understanding of how the stack operates. Monitor pro-
grams like BUFFALO sometimes place items on a stack manually and then perform
an RTI instruction to go to a user program. This technique is an odd use of the stack
and RTI instruction because an RTI would normally correspond to a previous interrupt.
6.1.4 Program Counter (PC)
The program counter is a 16-bit register that holds the address of the next instruction
to be executed.
6.1.5 Condition Code Register (CCR)
This register contains five status indicators, two interrupt masking bits, and a STOP
disable bit. The register is named for the five status bits since that is the major use of
the register. In the earlier M6800 and M6801 CPUs, there was no X interrupt mask and
no STOP disable control in this register.
The five status flags reflect the results of arithmetic and other operations of the CPU
as it performs instructions. The five flags are half carry (H), negative (N), zero (Z),
overflow (V), and carry/borrow (C). The half-carry flag, which is used only for BCD
arithmetic operations (see
6.3.1.2 Arithmetic Operations
), is only affected by the add
accumulators A and B (ABA), ADD, and add with carry (ADC) addition instructions (21
opcodes total). The N, Z, V, and C status bits allow for branching based on the results
of a previous operation. Simple branches are included for either state of any of these
four bits. Both signed and unsigned versions of branches are provided for the condi-
tions <,
≤
, =,
≠
,
≥
, or >.
The H bit indicates a carry from bit 3 during an addition operation. This status indicator
allows the CPU to adjust the result of an 8-bit BCD addition so it is in correct BCD for-
mat, even though the add was a binary operation. This H bit, which is only updated by
the ABA, ADD, and ADC instructions, is used by the DAA instruction to compensate
the result in accumulator A to correct BCD format.