M68HC11
REFERENCE MANUAL
ON-CHIP MEMORY
MOTOROLA
4-25
cation from $F0 to $C0. The calculated data pattern, $CF, was written to the location
during this programming operation (note the data pattern and voltage levels across the
top of the diagram). The floating gates are highlighted for the bits that should be pro-
grammed to zero after the operation. The floating gates of the programmed bits are
positively charged so these floating-gate transistors conduct, which introduces an in-
teresting question. For bits [3:0], there is a conductive path from V
DD
to the array
ground node. After programming, bits 4 and 5 have a conductive path from V
PP
to the
array ground node. Since there is effectively a conductive path from V
DD
to V
PP
, how
does the selective-write method work Experimental results for this method are good;
however, additional study is required.
Figure 4-10 Selective-Write Programming Method
The production testing failure provides some additional information about the selec-
tive-write method but does not answer all the questions.
Figure 4-11
shows the volt-
ages driving the EEPROM bits during the production test failure. The location was
previously programmed to $0D, as indicated by the highlighted floating gates. The bit
pattern and voltages across the top of
Figure 4-11
reflect the $FC value that was writ-
ten to the location during this programming operation. This programming operation
was expected to cause bit 0 to be programmed, but the operation failed (indicated by
the bit 0 floating gate not highlighted). This operation fails because there is already a
conductive path from V
DD
to V
PP
at the start of the programming operation. Since the
weak V
PP
supply is shunted to V
DD
, no programming can occur.
The failure of the composite programming case verifies that the conductive paths exist
from V
DD
to the array ground and from V
PP
to the array ground. The failure also shows
that these conductive paths are capable of shunting V
PP
to a low enough level to pre-
vent programming.
V
PP
comes from a charge pump having very little drive-current capability. It is not very
surprising that V
PP
could be effectively shorted to V
DD
without producing any notice-
able load to V
DD
. In the selective-write method (see
Figure 4-10
), the path from V
DD
to the array ground is conductive from the beginning of the operation. The path from
V
PP
to the array ground (through the bits being programmed) does not become con-
ductive until these floating gates are charged to a high enough positive level for the
ARRAY GROUND
(NOT DRIVEN)
7
VPP
6
5
4
3
2
1
0
VSS
1
0
1
1
VDD
VPP
VDD
VDD
1
1
VDD
VDD
0
VPP
1
VDD