- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄4033 > MC68EC060RC66 (Freescale Semiconductor)IC MPU 32BIT 66MHZ 206-PGA PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68EC060RC66 |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 3/128頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MPU 32BIT 66MHZ 206-PGA |
| 標(biāo)準(zhǔn)包裝： | 10 |
| 系列： | M680x0 |
| 處理器類型： | M680x0 32-位 |
| 速度： | 66MHz |
| 電壓： | 3.3V |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 206-BEPGA |
| 供應(yīng)商設(shè)備封裝： | 206-PGA（47.25x47.25） |
| 包裝： | 托盤 |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁
MOTOROLA
M68060 USER’S MANUAL
5-1
SECTION 5
CACHES
The MC68060 contains two independent 8-Kbyte, on-chip caches which can be accessed
simultaneously for instruction and operand data. The caches improve system performance
by providing low latency data to the MC68060 instruction and data pipes. This decouples
processor performance from system memory performance and increases bus availability for
alternate bus masters.
As shown in Figure 5-1, the instruction and data caches are contained in the instruction and
data memory units. The appropriate memory unit independently services instruction
prefetch from the instruction fetch unit (IFU) and data requests from the operand pipe unit
(OPU). The memory units translate the logical address in parallel with indexing into the
cache. If the translated (physical) address matches one of the cache entries, the access hits
in the cache. For a read operation, the memory unit supplies the data to the IPU instruction
buffer or the OPU, and for a write operation, the memory unit updates the cache. If the
access does not match one of the cache entries (misses in the cache) or a write access must
be written through to memory, the appropriate memory unit sends an external bus request
to the bus controller. The bus controller then reads or writes the required data. In the event
that the bus controller receives an external bus request from both memory units, the bus
controller invokes its priority scheme to choose between IPU and OPU requests.
To maintain cache coherency, the MC68060 provides automatic snoop-invalidation when it
is not the bus master. Unlike the MC68040, the MC68060 cannot not source or sink cache
data during alternate bus master accesses.
The MC68060 implements a bus snooper that maintains cache coherency by monitoring an
alternate bus master access to memory and invalidating matching cache lines during the
alternate bus master access. The MC68060 requires that memory pages shared with other
bus masters be cache inhibited or marked cachable writethrough (instead of copyback).
When a processor writes to writethrough pages, external memory is always updated through
an external bus access after updating the cache, keeping memory and cached data consis-
tent.
5.1 CACHE OPERATION
Both four-way set-associative caches have 128 sets of four 16-byte lines. Each set in both
caches has a tag (consisting of the upper 21 bits of the physical address), status information,
and four long words (128 bits) of data. The status information for the instruction cache is a
single valid bit for the line. The status information for the data cache is a valid bit and a dirty
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC7447AVU1420LB | IC MPU RISC 32BIT 360-BGA |
| MC8640DTVU1000HE | IC MPU DUAL CORE E600 1023FCCBGA |
| FH40-60S-0.5SV | CONN FPC/FFC 60POS .5MM VERT SMD |
| MC8640DTHX1000HE | IC DUAL CORE PROCESSOR 1023-CBGA |
| MC7457RX1000NC | IC MPU RISC 32BIT 483FCCBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68EC060RC75 | 功能描述:微處理器 - MPU 32B W/ CACHE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC68EC060ZU50 | 功能描述:IC MPU 68K 50MHZ 304-TBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M680x0 標(biāo)準(zhǔn)包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點(diǎn):- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:783-FCPBGA（29x29） 包裝:托盤 |
| MC68EC060ZU66 | 功能描述:微處理器 - MPU 32B W/ CACHE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC68EC060ZU75 | 功能描述:微處理器 - MPU 32B W/ CACHE RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC68EN302 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Integrated Multiprotocol Processor with Ethernet |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。