參數(shù)資料
型號(hào): MC68EC060RC66
廠商: Freescale Semiconductor
文件頁數(shù): 108/128頁
文件大小: 0K
描述: IC MPU 32BIT 66MHZ 206-PGA
標(biāo)準(zhǔn)包裝: 10
系列: M680x0
處理器類型: M680x0 32-位
速度: 66MHz
電壓: 3.3V
安裝類型: 通孔
封裝/外殼: 206-BEPGA
供應(yīng)商設(shè)備封裝: 206-PGA(47.25x47.25)
包裝: 托盤
Memory Management Unit
MOTOROLA
M68060 USER’S MANUAL
4-11
Figure 4-9. Detailed Flowchart of Descriptor Fetch Operation
FETCH DESCRIPTOR &
UPDATE HISTORY AND STATUS
FETCH DESCRIPTOR
AT PA = TA + (INDEX*4)
FETCH DESCRIPTOR AT
PA = DESCRIPTOR ADDRESS
WP = WP V W
OR 'INDIRECT'
EXECUTE
WRITE ACCESS
U
1, M
1
EXECUTE
LOCKED
RMW ACCESS
U
1
U = 1 &
U = 0 &
SCHEDULE
WRITE ACCESS
U
1
(SEE NOTE)
WP = WP V W
IF SCHEDULED, EXECUTE
WRITE ACCESS (U
1) FOR
PREVIOUS DESCRIPTOR
±
WP – ACCUMULATED WRITE-
PROTECTION STATUS
V – LOGICAL "OR" OPERATOR
– ASSIGNMENT OPERATOR
DUE TO ACCESS PIPELINING, A POINTER
DESCRIPTOR WRITE ACCESS TO UPDATE
THE U-BIT OCCURS AFTER THE READ OF
THE NEXT LEVEL DESCRIPTOR.
NOTE :
ABBREVIATIONS:
±
RETURN
EXIT TABLE SEARCH
TYPE = 'PAGE' OR 'POINTER'
OTHERWISE
TYPE = 'PAGE'
'INVALID'
'RESIDENT'
U = 1
U = 0
'INVALID'
TYPE =
'POINTER'
READ ACCESS
U = 0
(WP = 1 OR M = 1)
WP = 0 & M = 0
U = 1
WRITE ACCESS
OTHERWISE
±
TYPE = 'INDIRECT'
(INDEX = RI, PI, OR PGI)
(SEE NOTE)
NORMAL TERMINATION
OF ALL BUS TRANSFERS
NORMAL TERMINATION
OF ALL BUS TRANSFERS
OR 'INDIRECT'
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