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Applications Information
10-8
MC68307 USER’S MANUAL
MOTOROLA
10.2.2 Prescalable CPU Clock
It is apparent from
Table 10-1 that the EC000 CPU core contributes the most significant per-
centage of the total power consumption. As well as being able to stop the clock to the CPU
completely (when the CPU clock is stopped it cannot process code) this clock can be selec-
tively programmed to a prescaled value. This is achieved by writing to the CDEN bit in the
configuration register, with the CD2–CD0 bits set to select the required prescale value.
Only the CPU clock is divided by this prescale value, the enabled clocks to the peripheral
modules remain at the system clock frequency. Hence the module interfaces will operate as
normal.
This mode of operation is useful when the CPU is required to do some background house-
keeping tasks, which do not require the full processing power of the CPU, but one or more
of the peripheral modules is required to be operating at full speed. The CPU can subse-
quently select full speed clock by writing to the configuration register when an event occurs
that requires the full processing power.
The power consumption of the CPU is approximately proportional to the frequency, hence
by carefully selecting the correct prescale value for the current task, the power contribution
of the CPU to the overall device can be minimized.
10.2.3 Wake-Up
When the CPU clock has been stopped in low-power sleep mode it can only be restarted by
a wake-up condition or a system reset. Any event that causes an interrupt wakes-up the
CPU. For an interrupt to occur, the corresponding module must be clocked and the interrupt
priority level must be set to nonzero in the corresponding field of the interrupt control regis-
ter.
It is also possible to set a bit in the configuration register (UACW) that automatically restarts
the clock to the UART when a falling edge is detected on the RxD line. Any subsequent inter-
rupt from the UART module wakes-up the CPU.
This very flexible feature enables the CPU to wake-up in response to many different events,
for example:
—If UART receives a character
—If M-bus activity is detected
—After a fixed time by programming a timer
—If an external interrupt occurs
Because there is no loss of data in the fully static CPU core, the wake-up latency is reduced
to the minimum of only 10 system clocks. When the CPU wakes-up it immediately processes
the interrupt and then returns to the mainline code from which it stopped its own clock.
A STOP instruction is not absolutely necessary when the MC68307 is put into low-power
sleep mode, although, if such an instruction is used it will be handled correctly by the CPU.
Care must be taken with the interrupt mask since any interrupt wakes-up the CPU, but only
interrupts of priority greater than the mask cause the CPU to exit from the sleep instruction.