參數(shù)資料
型號(hào): MAX9856ETL+T
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 10/46頁(yè)
文件大?。?/td> 0K
描述: IC AUDIO CODEC 40TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
類型: 音頻編解碼器
數(shù)據(jù)接口: 串行
分辨率(位): 18 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
S/N 比,標(biāo)準(zhǔn) ADC / DAC (db): 77 / 91
動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 85 / 91
電壓 - 電源,模擬: 1.71 V ~ 3.6 V
電壓 - 電源,數(shù)字: 1.71 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 40-TQFN-EP(5x5)
包裝: 帶卷 (TR)
MAX9856
Low-Power Audio CODEC with
DirectDrive Headphone Amplifiers
18
______________________________________________________________________________________
Detailed Description
The MAX9856 is a high-performance, low-power stereo
audio CODEC designed to provide a complete audio
solution. Operating from a 1.8V supply, the MAX9856
achieves high performance and reasonable output power
while consuming only 9mW in DAC playback mode.
The internal 18-bit sigma-delta DAC accepts stereo di-
gital audio signals, and converts them to stereo audio
outputs that can be mixed with line inputs and/or micro-
phone inputs. The DAC is capable of operating at sam-
ple rates ranging from 8kHz to 96kHz with any master
clock frequency between 10MHz and 60MHz. The DAC
is capable of operating at a different sample rate than
the ADC. Both master and slave modes are available
when operating the interface in left-justified, I2S or PCM
data format. The incoming data can be level shifted and
highpass filtered in the digital domain. The highpass fil-
tering allows only reproducible frequencies to be con-
verted, saving power and improving sound quality.
The MAX9856 features stereo DirectDrive headphone
amplifiers and line outputs, which eliminate the need for
large output-coupling capacitors. The audio output path
includes high-quality mixing amplifiers to allow flexibility
in choosing from the DAC output and the stereo analog
line inputs. Volume control amplifiers provide adjustable
gains between +5.5dB and -74dB for the headphones.
The line outputs are capable of generating a 1VRMS out-
put signal from a full-scale digital input.
The digital audio signals of the internal 18-bit sigma-
delta ADC outputs are converted from the analog micro-
phone and line input paths. The ADC is capable of
operating at a sample rate ranging from 8kHz to 48kHz
with any master clock frequency between 10MHz and
60MHz. The ADC is capable of operating at a different
sample rate than the DAC. Both master and slave
modes are available when operating the interface in left-
justified, I2S, or PCM data formats. The outgoing data
can be level shifted and highpass filtered in the digital
domain. The highpass filtering allows reduction of wind
noise from microphone inputs.
Three microphone inputs are available. One fully differ-
ential input can be used with internal microphones
while a pair of single-ended inputs can be used with an
external mono or stereo headset microphone.
Selectable gain of 0dB, 20dB, and 30dB can be
applied to the input signals in addition to a 0 to 20dB
input PGA. The MAX9856 features AGC on the micro-
phone input path to automatically compensate for vary-
ing input signal levels and the limited dynamic range of
most microphones. The integrated noise gate provides
low-level audio noise quieting to lower the audible
noise floor.
An auxiliary input is available for sending externally
generated beeps and sound effects directly to the
headphones. The auxiliary input can also be used to
make DC measurements with the ADC by providing a
direct path to the ADC.
HPL, HPR, and JACKSNS provide a headset detection
feature which can both detect the insertion of a jack
and measure the load impedance. Jack detection can
be done in both shutdown and powered-on mode. The
headphone and line outputs feature ground sensing to
reduce ground noise. Reduced output offset voltage
and extensive click-and-pop suppression circuitry on
headphone amplifiers eliminate audible clicks and
pops at startup and shutdown
I2C Register Address Map
and Definitions
The MAX9856 has 28 internal registers used for config-
uration and status reporting. Table 1 lists all the regis-
ters, their addresses, and power-on-reset (POR) states.
Registers 0x00 and 0x01 are read only, while all the
other registers are read/write. Write zeros to all unused
bits in the register table when updating the register,
unless otherwise noted.
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