參數(shù)資料
型號: M34551E8-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, MICROCONTROLLER, PQFP48
封裝: 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù): 71/154頁
文件大?。?/td> 1778K
代理商: M34551E8-XXXFP
FUNCTIONAL BLOCK OPERATIONS
HARDWARE
1-12
4551 Group User’s Manual
Fig. 7 Program counter (PC) structure
Fig. 8 Data pointer (DP) structure
Fig. 9 SD instruction execution example
(8) Program counter (PC)
Program counter (PC) is used to specify a ROM address (page
and address). It determines a sequence in which instructions
stored in ROM are read. It is a binary counter that increments
the number of instruction bytes each time an instruction is
executed. However, the value changes to a specified address
when branch instructions, subroutine call instructions, return
instructions, or the table reference instruction (TABP p) is
executed.
Program counter consists of PCH (most significant bit to bit
7) which specifies to a ROM page and PCL (bits 6 to 0) which
specifies an address within a page. After it reaches the last
address (address 127) of a page, it specifies address 0 of the
next page (Figure 7).
Make sure that the PCH does not specify after the last page
of the built-in ROM.
(9) Data pointer (DP)
Data pointer (DP) is used to specify a RAM address and
consists of registers Z, X, and Y. Register Z specifies a RAM
file group, register X specifies a file, and register Y specifies
a RAM digit (Figure 8).
Register Y is also used to specify the port D bit position.
When using port D, set the port D bit position to register Y
certainly and execute the SD or RD instruction (Figure 9).
Z1 Z0 X3 X2 X1 X0 Y3 Y2 Y1 Y0
Data pointer (DP)
Register Z (2)
Register X (4)
Register Y (4)
Specifying
RAM digit
Specifying RAM file
Specifying RAM file group
p5 p4 p3 p2 p1 p0
a6 a5 a4 a3 a2 a1 a0
Program counter (PC)
PCH
Specifying page
PCL
Specifying address
p6
01
1
Set
Specifying bit position
Port D output latch
Register Y (4)
D5
D4
D0
D6
D7
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