參數(shù)資料
型號(hào): M34551E8-XXXFP
元件分類: 微控制器/微處理器
英文描述: 4-BIT, OTPROM, MICROCONTROLLER, PQFP48
封裝: 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù): 150/154頁
文件大?。?/td> 1778K
代理商: M34551E8-XXXFP
APPLICATION
2.3 Timers
2-18
4551 Group User’s Manual
(2)
Timer control register W1
The timer 1 count source selection bits are assigned to bits 0 and 1, and the prescaler dividing ratio
selection bit is assigned to the bit 2, and the prescaler control bit is assigned to the bit 3.
Set the contents of this register through register A with the TW1A instruction. The TAW1 instruction
can be used to transfer the contents of register W1 to register A.
Table 2.3.2 shows the timer control register W1.
Table 2.3.2 Timer control register W1
Timer control register W1
at reset : 00002
at power down : 00002
R/W
Stop (prescaler state initialized)
Operating
Instruction clock (INSTCK) divided by 4
Instruction clock (INSTCK) divided by 8
Count source
Prescaler output (ORCLK)
Carrier output (CARRY)
Carrier output/2 (CARRY/2)
Prescaler control bit
Prescaler dividing ratio selection
bit
Timer 1 count source selection
bits
W13
W12
W11
W10
0
1
0
1
Note: “R” represents read enabled, and “W” represents write enabled.
(3)
Timer control register W2
The timer 1 control bit is assigned to the bit 0, and timer 2 count value selection bits are assigned
to bits 1 and 2, and the timer 1 control bit is assigned to the bit 3.
Set the contents of this register through register A with the TW2A instruction. The TAW2 instruction
can be used to transfer the contents of register W2 to register A.
Table 2.3.3 shows the timer control register W2.
Table 2.3.3 Timer control register W2
W11
0
1
W10
0
1
0
1
Timer control register W2
at reset : 10002
at power down : – – – 02
R/W
f(XCIN)
Prescaler output (ORCLK)
Count source
Underflow occur every 214 count
Underflow occur every 213 count
Not available
Stop (timer 1 state retained)
Operating
Timer 2 count source selection
bit
Timer 2 count value selection bits
Timer 1 control bit
W23
W22
W21
W20
0
1
Note: “R” represents read enabled, and “W” represents write enabled.
“–” represents state retained.
W22
0
1
W21
0
1
0
1
0
1
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