參數(shù)資料
型號(hào)： M34551E8-XXXFP
元件分類： 微控制器/微處理器
英文描述： 4-BIT, OTPROM, MICROCONTROLLER, PQFP48
封裝： 7 X 10 MM, 0.65 MM PITCH, PLASTIC, QFP-48
文件頁數(shù)： 132/154頁
文件大?。?/td> 1778K
代理商： M34551E8-XXXFP
2-2
APPLICATION
2.1 I/O pins
4551 Group User’s Manual
2.1 I/O pins
The 4551 Group has the eight I/O pins, four input pins and eight output pins. (Ports P20–P23, D5–D7 are
also used as segment output pins SEG16–SEG19, INT input pin, XCIN, and XCOUT, respectively).
This section describes each port I/O function, related registers, application example using each port function
and notes.
2.1.1 I/O ports
(1)
Port P0
Port P0 is a 4-bit I/O port.
Port P0 has the key-on wakeup function and pull-up transistor.
s Input/output of port P0
q
Data input to port P0
Set the output latch of specified port P0i (i=0 to 3) to “1” with the OP0A instruction. If the output
latch is set to “0,” “L” level can be input.
The state of port P0 is transferred to register A when the IAP0 instruction is executed.
Data output from port P0
The contents of register A is output to port P0 with the OP0A instruction.
The output structure is an N-channel open-drain (built-in pull-up resistor).
(2)
Port P1
Port P1 is a 4-bit I/O port.
Port P1 has the key-on wakeup function and pull-up transistor which turn ON/OFF by setting register
PU0.
s Input/output of port P1
q Data input to port P1
Set the output latch of specified port P1i (i=0 to 3) to “1” with the OP1A instruction. If the output
latch is set to “0,” “L” level can be input.
The state of port P1 is transferred to register A when the IAP1 instruction is executed.
Data output from port P1
The contents of register A is output to port P1 with the OP1A instruction.
The output structure is an N-channel open-drain.
Note: When the pull-up function becomes valid, simultaneously, the key-on wakeup function becomes
valid.
Accordingly, be careful when using the key-on wakeup function. (Refer to the Table 2.1.1 and
notes for the power down function.)
q
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