![](http://datasheet.mmic.net.cn/30000/M32196F8UFP_datasheet_2359476/M32196F8UFP_499.png)
10.8 TOU (Output-Related 24-Bit Timer)
MULTIJUNCTION TIMERS
10
10-195
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
There are following three methods to disable PWM outputs.
(1) Using the signal entered from an external pin (TIN16/PWMOFF0 or TIN17/PWMOFF1) to disable PWM
outputs
The input signal on the external pin (TIN16/PWMOFF0) may be used to disable outputs from the ports
P87(P00)/TO21–P82(P05)/TO26 that are provided for the PWM outputs of the timer TOU0_0–TOU0_5. Simi-
larly, the input signal on the external pin (TIN17/PWMOFF1) may be used to disable outputs from the ports
P110(P10)/TO29–P115(P15)/TO34 that are provided for the PWM outputs of the timer TOU1_0–TOU1_5.
When selecting rising or falling or both edges at PWMOFFnS bit of PWMOFFn Input Procedure Con-
trol Register (PWMOFFnCR)
When edge detecting in extarnal pin (TIN16/PWMOFF0, TIN17/PWMOFF1, TIN33/PWMOFF2), PWM
output is disabed. At that time POnDISGm bit of PWM Output n Disable Control Gm register is set to "1."
Restoring PWM output enable status is done by "0" clearing POnDISGm bit of PWM Output n Disable
Control Gm Register (POnDISGmCR).
When selecting "L" level or "H" level at PWMOFFnS bit of PWMOFFn Input Procedure Control Regis-
ter (PWMOFFnCR)
During inputting PWM output disable level to extarrnal pin (TIN16/PWMOFF0, TIN17/PWMOFF1, TIN33/
PWMOFF2), PWM output is disabled.At that time POnDISGm bit of PWM Output n Disable Control Gm
Register is set to "1."
Restoring PWM output enable status is done by exiting inputting PWM output disable level. At that time
setting value written in last time is read out from POnDISGmbit of PWM Output n Disable Control Gm
Register (POnDISGmCR).
Note: When write to POnDISGm bit of PWM Output n Disable Control Gm Register druing input-
ting PWM output disable level to extarrnal pin (TIN16/PWMOFF0, TIN17/PWMOFF1,
TIN33/PWMOFF2), the value written is stored in the register. However, if read out, "1" is
read out. Then upon exiting PWM output disable level to external pin, it is possible to read
out the contents of setting POnDISGm bit, PWM output is controled by following the set-
ting value.
To disable PWM outputs by using the input signal on the external pin (TIN16/PWMOFF0 or TIN17/
PWMOFF1), set up the PWMOFFn Input Processing Control Register (PWMOFFnCR) and the PWMOFFn
Function Enable Register (PWMOFFnEN) as described below.
When using the signal inputted from TIN16/PWMOFF0 to disable PWM outputs
1. Write data "1" to the PWMOFF0CR register PWMOFF0SP bit.
2. After 1 above, write data "0" to the PWMOFF0SP bit and then write setting value ("000," "001," "010,"
"011," "10X" or "11X") to the PWMOFF0S bit in succession.
3. Enable the PWMOFF0 function by writing "1" to either or both of the PWMOFF0GAEN bits and
PWMOFF0GBEN bits of the PWMOFF0EN register.
Note: If theare are CPU, DMA, SDI, Writing cycle from NBD to any other area between 1 and 2, the
continuous setting ( A pair of two consecutive is 1 set for writing operation) is disabled and the
writing value is not reflected. Therefore, disable interrupts and DMA transfers before setting.
However the writing cycle from RTD and DRI is not effected.
When using TIN17/PWMOFF1 to disable PWM outputs
1. Write data "1" to the PWMOFF1CR register PWMOFF1SP bit.
2. After 1 above, write data "0" to the PWMOFF1SP bit and then write setting value ("000," "001," "010,"
"011," "10X" or "11X") to the PWMOFF1S bit in succession.
3. Enable the PWMOFF1 function by writing "1" to either or both of the PWMOFF1GAEN and
PWMOFF1GBEN bits of the PWMOFF1EN register.