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32192/32195/32196 Group Hardware Manual
OVERVIEW
Rev.1.10 REJ09B0123-0110 Apr.06.07
1.4 Pin Assignments
Note 1: The pins outputted at two places.
Note 2: The JTCK, JTDI, JTDO and JTMS pins are reset by input from the JTRST pin, and not reset from the RESET# pin.
Note 3: THERMAL BALL must be connected to the ground (GND).
Table 1.4.2 Pin Assignments of the M32192F8xWG (2/4)
Port
Function 1
Function 2
DRI function
NBD function
Function
Type
State during
reset
State upon
exiting reset
E6
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
E7
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
E8
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
E9
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
E10
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
E11
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
E12
P111/TO1/TO30/DD10
P111
TO1
TO30 (Note 1) DD10 (Note 1) Input/Output
VCCE
P111
Input
Hi-Z
E13
P114/TO4/TO33/DD7
P114
TO4
TO33 (Note 1) DD7 (Note 1) Input/Output
VCCE
P114
Input
Hi-Z
E14
P113/TO3/TO32/DD8
P113
TO3
TO32 (Note 1) DD8 (Note 1) Input/Output
VCCE
P113
Input
Hi-Z
E15
P112/TO2/TO31/DD9
P112
TO2
TO31 (Note 1) DD9 (Note 1) Input/Output
VCCE
P112
Input
Hi-Z
During single-chip and
external extension modes
P34
Input
Hi-Z
During processor mode
A19
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P33
Input
Hi-Z
During processor mode
A18
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P32
Input
Hi-Z
During processor mode
A17
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P35
Input
Hi-Z
During processor mode
A20
Output
Hi-Z
Undefined
F5
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
F6
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
F7
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
F8
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
F9
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
F10
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
F11
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
F12
VCCE
-
VCCE
-
VCCE
-
F13
P110/TO0/TO29/DD11
P110
TO0
TO29 (Note 1) DD11 (Note 1) Input/Output
VCCE
P110
Input
Hi-Z
F14
N.C.
-
F15
VSS
-
VSS
-
VSS
-
During single-chip and
external extension modes
P37
Input
Hi-Z
During processor mode
A22
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P36
Input
Hi-Z
During processor mode
A21
Output
Hi-Z
Undefined
G3
N.C.
-
During single-chip and
external extension modes
P20
Input
Hi-Z
During processor mode
A23
Output
Hi-Z
Undefined
G5
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
G6
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
G7
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
G8
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
G9
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
G10
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
G11
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
G12
MOD1
-
MOD1
-
Input
VCCE
MOD1
Input
Hi-Z
G13
N.C.
-
G14
N.C.
-
G15
FP
-
FP
-
Input
VCCE
FP
Input
Hi-Z
During single-chip and
external extension modes
P23
Input
Hi-Z
During processor mode
A26
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P22
Input
Hi-Z
During processor mode
A25
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P21
Input
Hi-Z
During processor mode
A24
Output
Hi-Z
Undefined
H4
VCC-BUS
-
VCC-BUS
-
VCC-BUS
-
H5
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
H6
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
H7
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
H8
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
H9
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
H10
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
H11
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
H12
P97/TO20/DD12
P97
TO20
-
DD12 (Note 1) Input/Output
VCCE
P97
Input
Hi-Z
H13
MOD0
-
MOD0
-
Input
VCCE
MOD0
Input
Hi-Z
H14
RESET#
-
RESET#
-
Input
VCCE
RESET#
Input
Hi-Z
H15
N.C.
-
J1
VSS
-
VSS
-
VSS
-
During single-chip and
external extension modes
P24
Input
Hi-Z
During processor mode
A27
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P25
Input
Hi-Z
During processor mode
A28
Output
Hi-Z
Undefined
J4
VSS
-
VSS
-
VSS
-
J5
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
J6
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
J7
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
J8
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
J9
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
J10
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
J11
THERMAL-BALL (Note 3)
-
VSS
-
VSS
-
J12
P96/TO19/DD13
P96
TO19
-
DD13 (Note 1) Input/Output
VCCE
P96
Input
Hi-Z
J13
P94/TO17/TXD5/DD15
P94
TO17
TXD5
DD15 (Note 1) Input/Output
VCCE
P94
Input
Hi-Z
J14
P95/TO18/RXD5/DD14
P95
TO18
RXD5
DD14 (Note 1) Input/Output
VCCE
P95
Input
Hi-Z
J15
N.C.
-
During single-chip and
external extension modes
P27
Input
Hi-Z
During processor mode
A30
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P00
Input
Hi-Z
During processor mode
DB0
Input/Output
Hi-Z
Pin No.
Symbol
Function
Type
Power
supply
Condition
Pin state when reset
F1
P34/A19/TIN30/DD20
P34
A19
TIN30
DD20
Input/Output VCC-BUS
F2
P33/A18/TIN7/DD19
P33
A18
TIN7
DD19
Input/Output VCC-BUS
F3
P32/A17/TIN6/DD18
P32
A17
TIN6
DD18
Input/Output VCC-BUS
F4
P35/A20/TIN31/DD21
P35
A20
TIN31
DD21
Input/Output VCC-BUS
G1
P37/A22/TIN33/DD23
P37
A22
TIN33
DD23
Input/Output VCC-BUS
G2
P36/A21/TIN32/DD22
P36
A21
TIN32
DD22
Input/Output VCC-BUS
G4
P20/A23/DD24
P20
A23
-
DD24
Input/Output VCC-BUS
H1
P23/A26/DD27
P23
A26
-
DD27
Input/Output VCC-BUS
H2
P22/A25/DD26
P22
A25
-
DD26
Input/Output VCC-BUS
H3
P21/A24/DD25
P21
A24
-
DD25
Input/Output VCC-BUS
J2
P24/A27/DD28
P24
A27
-
DD28
Input/Output VCC-BUS
J3
P25/A28/DD29
P25
A28
-
DD29
Input/Output VCC-BUS
K1
P27/A30/DD31
P27
A30
-
DD31
Input/Output VCC-BUS
K2
P00/DB0/TO21/DD0
P00
DB0
TO21 (Note 1) DD0 (Note 1) Input/Output VCC-BUS