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32192/32195/32196 Group Hardware Manual
OVERVIEW
Rev.1.10 REJ09B0123-0110 Apr.06.07
Table 1.4.1 Pin Assignments of the M32192F8xFP, M32195F4xFP, and M32196F8xFP (4/4)
Note 1: The pins outputted at two places.
Port
Function 1
Function 2
DRI function
NBD function
Function
Type
State during
reset
State upon
exiting reset
118 P107/TO15/RXD4/DD0
P107
TO15
RXD4
DD0(*)
Input/output
P107
Input
Hi-Z
During single-chip and
external extension modes
P124
Input
Hi-Z
During processor mode
A9
Output
Hi-Z
During single-chip and
external extension modes
P125
Input
Hi-Z
During processor mode
A10
Output
Hi-Z
121
P126/TCLK2/
CS2#/DD1
P126
TCLK2
CS2#(*)
DD1(*)
Input/
output
P126
Input
Hi-Z
122
P127/TCLK3/
CS3#/DD0
P127
TCLK3
CS3#(*)
DD0(*)
Input/
output
P127
Input
Hi-Z
123 MOD2
-
MOD2
-
MOD2
-
124
P130/TIN16/
PWMOFF0/DIN0
P130
TIN16/
PWMOFF0
-DIN0
Input/
output
P130
Input
Hi-Z
125
P131/TIN17/
PWMOFF1/DIN1
P131
TIN17/
PWMOFF1
-DIN1
Input/
output
P131
Input
Hi-Z
126 P132/TIN18/DIN2
P132
TIN18
-
DIN2
Input/output
P132
Input
Hi-Z
127 P133/TIN19/DIN3
P133
TIN19
-
DIN3
Input/output
P133
Input
Hi-Z
128
P134/TIN20/
TXD3/DIN4
P134
TIN20
TXD3(*)
DIN4
Input/
output
P134
Input
Hi-Z
129 P135/TIN21/RXD3
P135
TIN21
RXD3(*)
-
Input/output
P135
Input
Hi-Z
130 P136/TIN22/CRX1
P136
TIN22
CRX1(*)
-
Input/output
P136
Input
Hi-Z
131 P137/TIN23/CTX1
P137
TIN23
CTX1(*)
-
Input/output
P137
Input
Hi-Z
132 VCCE
-
VCCE
-
VCCE
-
133
P150/TIN0/
CLKOUT/WR#
P150
TIN0
CLKOUT(*)/
WR#(*)
-
Input/
output
P150
Input
Hi-Z
134 P153/TIN3/WAIT#
P153
TIN3
WAIT#(*)
-
Input/output
P153
Input
Hi-Z
During single-chip mode
P41
Input
Hi-Z
During external extension and
processor modes
BLW#/
BLE#
Output
Hi-Z
"H" level
During single-chip mode
P42
Input
Hi-Z
During external extension and
processor modes
BHW#/
BHE#
Output
Hi-Z
"H" level
137 EXCVCC
-
EXCVCC
-
EXCVCC
-
138 VSS
-
VSS
-
VSS
-
During single-chip mode
P43
Input
Hi-Z
During external extension and
processor modes
RD#
Output
Hi-Z
"H" level
During single-chip and
external extension modes
P44
Input
Hi-Z
During processor mode
CS0#
Output
Hi-Z
"H" level
During single-chip and
external extension modes
P45
Input
Hi-Z
During processor mode
CS1#
Output
Hi-Z
"H" level
During single-chip and
external extension modes
P46
Input
Hi-Z
During processor mode
A13
Output
Hi-Z
Undefined
During single-chip and
external extension modes
P47
Input
Hi-Z
During processor mode
A14
Output
Hi-Z
Undefined
144 P220/CTX0/HACK#
P220
CTX0(*)
HACK#(*)
-
Input/output
P220
Input
Hi-Z
A10
DD2(*)
Input/
output
119 P124/TCLK0/A9/DD3
P124
TCLK0
A9
DD3(*)
Input/
output
120 P125/TCLK1/A10/DD2
P125
TCLK1
Symbol
Type
Condition
139 P43/RD#
P43
RD#
-
Input/
output
Function
-
Input/
output
140 P44/CS0#/TIN8
P44
CS0#
-
Input/
output
142 P46/A13/TIN10
P46
A13
143 P47/A14/TIN11
P47
A14
Pin state when reset
Pin
No.
-
Input/
output
-
Input/
output
141 P45/CS1#/TIN9
P45
CS1#
TIN11
-
TIN8
TIN9
TIN10
136 P42/BHW#/BHE#
P42
BHW#/
BHE#
--
Input/
output
135 P41/BLW#/BLE#
P41
BLW#/
BLE#
--
Input/
output
Power
supply
VCCE
VCC-BUS
1.4 Pin Assignments