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參數(shù)資料
| 型號： | LH7A400N0G000B5 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | 32-Bit System-on-Chip |
| 封裝： | LH7A400N0F000B5<SOT1020-1 (LFBGA256)|<<http://www.nxp.com/packages/SOT1020-1.html<1<Always Pb-free,;LH7A400N0F076B5<SOT1020-1 (LFBGA256)|<<http://www.nxp.com/packages/SOT |
| 文件頁數(shù)： | 58/65頁 |
| 文件大?。?/td> | 834K |
| 代理商： | LH7A400N0G000B5 |
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LH7A400
32-Bit System-on-Chip
58
Rev. 01
—
16 July 2007
Preliminary data sheet
NXP Semiconductors
Operating Temperature and Noise Immunity
The junction temperature, Tj, is the operating tem-
perature of the transistors in the integrated circuit. The
switching speed of the CMOS circuitry within the SoC
depends partly on Tj, and the lower the operating tem-
perature, the faster the CMOS circuits will switch.
Increased switching noise generated by faster switch-
ing circuits could affect the overall system stability. The
amount of switching noise is directly affected by the
application executed on the SoC.
NXP recommends that users implementing a system
to meet industrial temperature standards should use an
external oscillator rather than a crystal to drive the sys-
tem clock input of the System-on-Chip. This change
from crystal to oscillator will increase the robustness
(i.e., noise immunity of the clock input to the SoC).
Printed Circuit Board Layout Practices
LH7A400 POWER SUPPLY DECOUPLING
The LH7A400 has separate power and ground pins
for different internal circuitry sections. The VDD and
VSS pins supply power to I/O buffers, while VDDC and
VSSC supply power to the core logic, and VDDA/VSSA
supply analog power to the PLLs.
Each of the VDD and VDDC pins must be provided
with a low impedance path to the corresponding board
power supply. Likewise, the VSS, VSSA, and VSSC
pins must be provided with a low impedance path to the
board ground.
Each power supply must be decoupled to ground
using at least one 0.1
μ
F high frequency capacitor
located as close as possible to a VDDx, VSSx pin pair
on each of the four sides of the chip. If room on the cir-
cuit board allows, add one 0.01
μ
F high frequency
capacitor near each VDDx, VSSx pair on the chip.
To be effective, the capacitor leads and associated
circuit board traces connecting to the chip VDDx, VSSx
pins must be kept to less than half an inch (12.7 mm)
per capacitor lead. There must be one bulk 10
μ
F
capacitor for each power supply placed near one side
of the chip.
RECOMMENDED PLL, VDDA, VSSA FILTER
The VDDA pins supply power to the chip PLL cir-
cuitry. VSSA is the ground return path for the PLL cir-
cuit. NXP recommends a low-pass filter attached as
shown in Figure 47. The values of the inductor and
capacitors are not critical. The low-pass filter prevents
high frequency noise from adversely affecting the PLL
circuits. The distance from the IC pin to the high fre-
quency capacitor should be as short as possible.
UNUSED INPUT SIGNAL CONDITIONING
Floating input signals can cause excessive power
consumption. Unused inputs without internal pull-up or
pull-down resistors should be pulled up or down exter-
nally (NXP recommends tying HIGH), to tie the signal
to its inactive state. 33 K
or less is recommended.
Some GPIO signals default to inputs. If the pins that
carry these signals are unused, software can program
these signals as outputs, eliminating the need for pull-
ups or pull-downs. Power consumption may be higher
than expected until software completes programming
the GPIO. Some LH7A400 inputs have internal pull-
ups or pull-downs. If unused, these inputs do not
require external conditioning.
OTHER CIRCUIT BOARD LAYOUT PRACTICES
All outputs have fast rise and fall times. Printed cir-
cuit trace interconnection length must therefore be
reduced to minimize overshoot, undershoot and reflec-
tions caused by transmission line effects of these fast
output switching times. This recommendation particu-
larly applies to the address and data buses.
When considering capacitance, calculations must
consider all device loads and capacitances due to the
circuit board traces. Capacitance due to the traces will
depend upon a number of factors, including the trace
width, dielectric material the circuit board is made from
and proximity to ground and power planes.
Attention to power supply decoupling and printed cir-
cuit board layout becomes more critical in systems with
higher capacitive loads. As these capacitive loads
increase, transient currents in the power supply and
ground return paths also increase.
Figure 47. VDDA, VSSA Filter Circuit
LH7A400-189
VDDA
VDDC
VSSA
22 μF
10 μH
VDDC
(SOURCE)
0.1 μF
+
LH7A400
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH7A400N0G000B5,55 | 功能描述:ARM微控制器 - MCU LCD,USB FS/HOST,MMU,ADC,BGA324 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LH7A400N0G000B5,551 | 制造商:NXP Semiconductors 功能描述: |
| LH7A400N0G000B5;55 | 功能描述:ARM微控制器 - MCU LCD USB FS/HOST MMU RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LH7A400N0G000B5-S | 功能描述:ARM微控制器 - MCU ARM9 LCD USB HOST RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LH7A400N0W000 | 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:32-Bit System-on-Chip |
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