參數(shù)資料
型號(hào)： LH7A400N0G000B5
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學(xué)處理器
英文描述： 32-Bit System-on-Chip
封裝： LH7A400N0F000B5<SOT1020-1 (LFBGA256)|<<http://www.nxp.com/packages/SOT1020-1.html<1<Always Pb-free,;LH7A400N0F076B5<SOT1020-1 (LFBGA256)|<<http://www.nxp.com/packages/SOT
文件頁(yè)數(shù)： 39/65頁(yè)
文件大?。?/td> 834K
代理商： LH7A400N0G000B5
32-Bit System-on-Chip
LH7A400
Preliminary data sheet
Rev. 01
—
16 July 2007
39
NXP Semiconductors
Synchronous Memory Controller Waveforms
Figure 14 shows the timing for a Synchronous Burst
Read (page already open). Figure 15 shows the timing
for Activate a Bank and Write.
SSP Waveforms
The Synchronous Serial Port (SSP) supports three
data frame formats:
Texas Instruments SSI
Motorola SPI
National Semiconductor MICROWIRE
Each frame format is between 4 and 16 bits in
length, depending upon the programmed data size.
Each data frame is transmitted beginning with the
Most Significant Bit (MSB) i.e. ‘big endian’. For all
three formats, the SSP serial clock is held LOW (inac-
tive) while the SSP is idle. The SSP serial clock tran-
sitions only during active transmission of data. The
SSPFRM signal marks the beginning and end of a
frame. The SSPEN signal controls an off-chip line
driver’s output enable pin.
Figure 16 and Figure 17 show Texas Instruments
synchronous serial frame format, Figure 18 through
Figure 25 show the Motorola SPI format, and Figure 26
and Figure 27 show National Semiconductor’s MICRO-
WIRE data frame format.
For Texas Instruments SSI format, the SSPFRM pin
is pulsed prior to each frame’s transmission for one
serial clock period beginning at its rising edge. For this
frame format, both the SSP and the external slave
device drive their output data on the rising edge of the
clock and latch data from the other device on the falling
edge. See Figure 16 and Figure 17.
Figure 13. External Asynchronous Memory Read with 4 Wait States (BCRx:WST1 = 0b100)
LH7A400-202
10
9
8
7
6
5
4
3
2
1
0
A[27:0]
HCLK
VALID ADDRESS
D[31:0]
nCS[3:0,
CS[7:6]
nOE
VALID DATA
nBLE
0 WAIT STATE,
DATA WOULD BE
LATCHED HERE
tWS
4 WAIT STATES,
DATA LATCHED
HERE
WAIT
STATE 1
WAIT
STATE 2
WAIT
STATE 3
WAIT
STATE 4
nCSx Valid
nOE Valid
nBLE Valid
tWS
tWS
tWS
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LH7A400N0G000B5,55 功能描述:ARM微控制器 - MCU LCD,USB FS/HOST,MMU,ADC,BGA324 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LH7A400N0G000B5,551 制造商:NXP Semiconductors 功能描述:
LH7A400N0G000B5;55 功能描述:ARM微控制器 - MCU LCD USB FS/HOST MMU RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LH7A400N0G000B5-S 功能描述:ARM微控制器 - MCU ARM9 LCD USB HOST RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
LH7A400N0W000 制造商:SHARP 制造商全稱:Sharp Electrionic Components 功能描述:32-Bit System-on-Chip
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