參數(shù)資料
型號: KSZ8851SNL-EVAL
廠商: Micrel Inc
文件頁數(shù): 5/80頁
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8851SNL
產(chǎn)品培訓(xùn)模塊: KSZ8851 10/100 Embedded Controllers
標(biāo)準(zhǔn)包裝: 1
系列: LinkMD®
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8851SNL
主要屬性: 1 個端口,100BASE-TX/10BASE-T
次要屬性: SPI 接口,LinkMD 線纜診斷
已供物品: 板,文檔
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
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576-3299-1-ND - IC CTLR MAC/PHY NON-PCI 32-MLF
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576-3254-ND - IC CTLR MAC/PHY NON-PCI 32-QFN
其它名稱: 576-3293
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
13
M9999-083109-2.0
Functional Description
The KSZ8851SNL is a single-chip Fast Ethernet MAC/PHY controller consisting of a 10/100 physical layer transceiver
(PHY), a MAC, and an industry standard Serial Peripheral Interface (SPI). The host CPU is via SPI interface to read/write
KSZ8851SNL internal registers either byte (8-bit), word (16-bit) or double word (32-bit) and to access KSZ8851SNL
RXQ/TXQ FIFOs for packet receive/transmit.
The KSZ8851SNL is fully compliant to IEEE802.3u standards.
Functional Overview
Power Management
The KSZ8851SNL supports enhanced power management feature in low power state with energy detection to ensure low-
power dissipation during device idle periods. There are four operation modes under the power management function
which is controlled by two bits in PMECR (0xD4) register as shown below:
PMECR[1:0] = 00 Normal Operation Mode
PMECR[1:0] = 01 Energy Detect Mode
PMECR[1:0] = 10 Soft Power Down Mode
PMECR[1:0] = 11 Power Saving Mode
Table 1 indicates all internal function blocks status under four different power management operation modes.
Power Management Operation Modes
KSZ8851SNL
Function Blocks
Normal mode
Power saving mode
Energy detect mode
Soft power down mode
Internal PLL Clock
Enabled
Disabled
Tx/Rx PHY
Enabled
Rx unused block disabled
Energy detect at Rx
Disabled
MAC
Enabled
Disabled
SPI Interface
Enabled
Disabled
Table 1. Internal Function Blocks Status
Normal Operation Mode
This is the default setting bit[1:0]=00 in PMECR register after the chip power-up or hardware reset (pin 67). When
KSZ8851SNL is in this normal operation mode, all PLL clocks are running, PHY and MAC are on and the host interface is
ready for CPU read or write.
During the normal operation mode, the host CPU can set the bit[1:0] in PMECR register to transit the current normal
operation mode to any one of the other three power management operation modes.
Energy Detect Mode
The energy detect mode provides a mechanism to save more power than in the normal operation mode when the
KSZ8851SNL is not connected to an active link partner. For example, if cable is not present or it is connected to a
powered down partner, the KSZ8851SNL can automatically enter to the low power state in energy detect mode. Once
activity resumes due to plugging a cable or attempting by the far end to establish link, the KSZ8851SNL can automatically
power up to normal power state in energy detect mode.
Energy detect mode consists of two states, normal power state and low power state. While in low power state, the
KSZ8851SNL reduces power consumption by disabling all circuitry except the energy detect circuitry of the receiver. The
energy detect mode is entered by setting bit[1:0]=01 in PMECR register. When the KSZ8851SNL is in this mode, it will
monitor the cable energy. If there is no energy on the cable for a time longer than pre-configured value at bit[7:0] Go-
Sleep time in GSWUTR register, KSZ8851SNL will go into a low power state. When KSZ8851SNL is in low power state, it
will keep monitoring the cable energy. Once the energy is detected from the cable and is continuously presented for a
time longer than pre-configured value at bit[15:8] Wake-Up time in GSWUTR register, the KSZ8851SNL will enter either
the normal power state if the auto-wakeup enable bit[7] is set in PMECR register or the normal operation mode if both
auto-wakeup enable bit[7] and wakeup to normal operation mode bit[6] are set in PMECR register.
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