參數(shù)資料
型號: KSZ8851SNL-EVAL
廠商: Micrel Inc
文件頁數(shù): 41/80頁
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8851SNL
產(chǎn)品培訓(xùn)模塊: KSZ8851 10/100 Embedded Controllers
標準包裝: 1
系列: LinkMD®
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8851SNL
主要屬性: 1 個端口,100BASE-TX/10BASE-T
次要屬性: SPI 接口,LinkMD 線纜診斷
已供物品: 板,文檔
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: 576-3299-6-ND - IC CTLR MAC/PHY NON-PCI 32-MLF
576-3299-1-ND - IC CTLR MAC/PHY NON-PCI 32-MLF
576-3299-2-ND - IC CTLR MAC/PHY NON-PCI 32-MLF
576-3254-ND - IC CTLR MAC/PHY NON-PCI 32-QFN
其它名稱: 576-3293
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
46
M9999-083109-2.0
Bit
Default Value
R/W
Description
15-0
0x0000
RW
WF1BM3
Wake-up frame 1 Byte Mask 3.
The last 16 bytes mask covering bytes 49 to 64 of a Wake-up frame 1 pattern.
0x4C – 0x4F: Reserved
Wakeup Frame 2 CRC0 Register (0x50 – 0x51): WF2CRC0
This register contains the expected CRC values of the Wake up frame 2 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
WF2CRC0
Wake-up frame 2 CRC (lower 16 bits). The expected CRC value of a Wake-up frame 2
pattern.
Wakeup Frame 2 CRC1 Register (0x52 – 0x53): WF2CRC1
This register contains the expected CRC values of the wake-up frame 2 pattern.
The value of the CRC calculated is based on the IEEE 802.3 Ethernet standard, it is taken over the bytes specified in
the wake up byte mask registers.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
WF2CRC1
Wake-up frame 2 CRC (upper 16 bits). The expected CRC value of a Wake-up frame 2
pattern.
Wakeup Frame 2 Byte Mask 0 Register (0x54 – 0x55): WF2BM0
This register contains the first 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the first byte
of the Wake up frame 2, setting bit 15 selects the 16th byte of the Wake up frame 2.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
WF2BM0
Wake-up frame 2 Byte Mask 0. The first 16 bytes mask of a Wake-up frame 2 pattern.
Wakeup Frame 2 Byte Mask 1 Register (0x56 – 0x57): WF2BM1
This register contains the next 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 17th byte
of the Wake up frame 2. Setting bit 15 selects the 32nd byte of the Wake up frame 2.
Bit
Default Value
R/W
Description
15-0
0x0000
RW
WF2BM1
Wake-up frame 2 Byte Mask 1. The next 16 bytes mask covering bytes 17 to 32 of a
Wake-up frame 2 pattern.
Wakeup Frame 2 Byte Mask 2 Register (0x58 – 0x59): WF2BM2
This register contains the next 16 bytes mask values of the Wake up frame 2 pattern. Setting bit 0 selects the 33rd byte
of the Wake up frame 2. Setting bit 15 selects the 48th byte of the Wake up frame 2.
Bit
Default Value
R/W
Description
15-0
0
RW
WF2BM2
Wake-up frame 2 Byte Mask 2. The next 16 bytes mask covering bytes 33 to 48 of a
Wake-up frame 2 pattern.
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