參數(shù)資料
型號: KSZ8851SNL-EVAL
廠商: Micrel Inc
文件頁數(shù): 4/80頁
文件大?。?/td> 0K
描述: BOARD EVALUATION KSZ8851SNL
產(chǎn)品培訓(xùn)模塊: KSZ8851 10/100 Embedded Controllers
標(biāo)準(zhǔn)包裝: 1
系列: LinkMD®
主要目的: 接口,以太網(wǎng)控制器(PHY 和 MAC)
嵌入式:
已用 IC / 零件: KSZ8851SNL
主要屬性: 1 個端口,100BASE-TX/10BASE-T
次要屬性: SPI 接口,LinkMD 線纜診斷
已供物品: 板,文檔
產(chǎn)品目錄頁面: 1081 (CN2011-ZH PDF)
相關(guān)產(chǎn)品: 576-3299-6-ND - IC CTLR MAC/PHY NON-PCI 32-MLF
576-3299-1-ND - IC CTLR MAC/PHY NON-PCI 32-MLF
576-3299-2-ND - IC CTLR MAC/PHY NON-PCI 32-MLF
576-3254-ND - IC CTLR MAC/PHY NON-PCI 32-QFN
其它名稱: 576-3293
Micrel, Inc.
KSZ8851SNL/SNLI
August 2009
12
M9999-083109-2.0
Pin Number
Pin Name
Type
Pin Function
Hardware reset pin (active Low). This reset input must be held low for a minimum of 10ms
after stable supply voltage 3.3V.
20
X1
I
21
X2
O
25MHz crystal or oscillator clock connection.
Pins (X1, X2) connect to a crystal. If an oscillator is used, X1 connects to a 3.3V tolerant
oscillator and X2 is a no connect.
Note: Clock requirement is +/- 50ppm for either crystal or oscillator.
22
DGND
Gnd
Digital IO ground
23
VDD_D1.8
P
1.8V digital power supply from VDD_CO1.8 (pin 5) with appropriate filtering. If VDD_IO is
1.8V, this pin must be supplied power from the same source as pins 25 and 30 (VDD_IO)
with appropriate filtering.
24
DGND
Gnd
Digital IO ground
25
VDD_IO
P
3.3V, 2.5V or 1.8V digital VDD input power supply for IO with well decoupling capacitors.
26
CSN
Ipu
SPI slave mode: Chip Select Not
Active low input pin for SPI interface.
27
SO
O
SPI slave mode: Serial data out for SPI interface. This SO is tri-stated output when CSN
is negated and this pin must have external 4.7K pull-up to keep the SO line high while the
driver is tri-stated.
28
SCLK
I
SPI slave mode: Serial clock input for SPI interface. This clock speed can run up to
40MHz.
29
DGND
Gnd
Digital IO ground
30
VDD_IO
P
3.3V, 2.5V or 1.8V digital VDD input power supply for IO with well decoupling capacitors.
31
SI
Ipd
SPI slave mode: Serial data in for SPI interface.
32
LED1
Opu
Programmable LED1 output to indicate PHY activity/status (see LED0 description at pin1)
Legend:
P = Power supply
Gnd = Ground
I/O = Bi-directional I = Input O = Output.
Ipd = Input with internal pull-down (58K +/-30%).
Ipu = Input with internal pull-up (58K +/-30%).
Opd = Output with internal pull-down (58K +/-30%).
Opu = Output with internal pull-up (58K +/-30%).
Ipu/O = Input with internal pull-up (58K +/-30%) during power-up/reset; output pin otherwise.
Ipd/O = Input with internal pull-down (58K +/-30%) during power-up/reset; output pin otherwise.
Strapping Options
Pin Number
Pin Name
Type
Pin Function
6
EED_IO
Ipd/O
EEPROM select:
Pull-up = EEPROM present
Floating (NC) or Pull-down = EEPROM not present (default)
During power-up / reset, this pin value is latched into register CCR, bit 9
Note: Ipd/O = Input with internal pull-down (58K +/-30%) during power-up/reset; output pin otherwise.
Pin strap-ins are latched during power-up or reset.
相關(guān)PDF資料
PDF描述
EVAL-ADF4007EBZ1 BOARD EVALUATION FOR ADF4007EB1
V110C12C100B CONVERTER MOD DC/DC 12V 100W
DWP-125-3/4-0-STK HEATSHRINK POLY 3/4"X4' BLK
EBA30DRMD CONN EDGECARD 60POS .125 SQ WW
H2MXH-2618M DIP CABLE - HDM26H/AE26M/X
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
KSZ8851SNL-EVAL 制造商:Micrel Inc 功能描述:BOARD EVALUATION FOR KSZ8851SNL
KSZ8851SNLI TR 功能描述:以太網(wǎng) IC 10/100BT Ethernet MAC + PHY with SPI Bus Interface (I-Temp, Lead free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray
KSZ8851SNLITR 制造商:Micrel 功能描述:Ethernet Controller Single Chip 100Mbps
KSZ8851SNLI-TR 功能描述:Ethernet Controller 10/100 Base-T/TX PHY SPI Interface 32-MLF? (5x5) 制造商:microchip technology 系列:- 包裝:剪切帶(CT) 零件狀態(tài):有效 協(xié)議:以太網(wǎng) 功能:控制器 接口:SPI 標(biāo)準(zhǔn):10/100 Base-T/TX PHY 電壓 - 電源:1.8V,2.5V,3.3V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 封裝/外殼:32-VFQFN 裸露焊盤,32-MLF? 供應(yīng)商器件封裝:32-MLF?(5x5) 標(biāo)準(zhǔn)包裝:1
KSZ8851SNLTR 制造商:Micrel Inc 功能描述: