參數(shù)資料
型號: IS43R32800B-5BL
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 8M X 32 DDR DRAM, 0.7 ns, PBGA144
封裝: 12 X 12 MM, 0.80 MM PITCH, LEAD FREE, MINI, FBGA-144
文件頁數(shù): 35/39頁
文件大?。?/td> 507K
代理商: IS43R32800B-5BL
Integrated Silicon Solution, Inc. — www.issi.com
5
Rev. 00D
03/19/08
IS43R32800B
ISSI's 256-Mbit DDR SDRAM
provides basic functions, bank (row) activate, burst read / write, bank (row)
precharge,and auto /selfrefresh.E achcommand is definedbycontrol signalsof/RA S, /CAS and
/WEatCLK rising edge.I nadditionto3signals,/CS ,C KE andA8are usedas chip select,refresh
option,and prechargeoption,respectively. To know thedetaileddefinitionofcommands, please
seethe commandtruth table.
/CS
Chip Select :L =select, H=deselect
/RAS
Command
/CAS
Command
/WE
Command
CK E
RefreshOption@refreshcommand
A8
PrechargeOption@ prechargeorread/writecommand
CL K
define basiccommands
/CLK
Activate( ACT)
[/RA S=L, /CAS =/WE =H]
AC Tcommand activatesa rowinanidlebankindicated by BA .
Read (R EAD)
[/RAS =H,/CA S=L, /WE= H]
RE AD commandstartsburst read from theactivebankindicated by BA .F irst output data appearsafter
/CAS latency. When A8 =H at this command, thebankisdeactivated afterthe burstread(auto-
precharge READ A)
Write(WRITE)
[/RA S=H, /CAS =/WE =L ]
WR IT Ec ommand starts burstwrite to theactivebankindicated by BA .T otal data length to be written
is setbyburst length.W henA8=Hatthiscommand,the bank is deactivatedafter theburst write
(auto-precharge, WRITEA )
Prechar ge (P RE )
[/RAS =L ,/CA S=H, /WE= L]
PR Ec ommand deactivatesthe activebankindicated by BA .T hiscommand also terminates burstread
/write operation. When A8 =H at this command, allbanks aredeactivated (precharge all, PREA ).
Auto-Ref resh(REFA )
[/RAS =/CA S=L, /WE= CK E= H]
RE FA commandstartsauto-refreshcycle.R efresh addressincluding bank addressare generated
internally.A fter this command,the banksare precharged automatically.
FUNCTIONAL DESCRIPTION
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