參數(shù)資料
型號: IDT82P20516DBFG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 84/115頁
文件大?。?/td> 0K
描述: IC LIU T1/E1/J1 16CH SH 484BGA
標(biāo)準(zhǔn)包裝: 84
功能: 線路接口單元(LIU)
接口: E1,J1,T1
電路數(shù): 16
電源電壓: 1.8V, 3.3V
功率(瓦特): 2.89W
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 484-LFBGA
供應(yīng)商設(shè)備封裝: 484-CABGA(19x19)
包裝: 托盤
包括: AIS 警報檢測器和發(fā)生器,回送功能,PRBS 發(fā)生器 / 檢測器,遠(yuǎn)程檢測器和發(fā)生器
IDT82P20516
16-CHANNEL SHORT HAUL E1 LINE INTERFACE UNIT
Programming Information
70
December 17, 2009
RCF1 - Receive Configuration Register 1
RCF2 - Receive Configuration Register 2
Address: 00BH, 04BH, 08BH, 0CBH, 10BH, 14BH, 18BH, 1CBH, (CH1~CH8)
20BH, 24BH, 28BH, 2CBH, 30BH, 34BH, 38BH, (CH9~CH15)
7CBH (CH0)
Type: Read / Write
Default Value: 01H
Bit
Name
Description
7 - 5
-
Reserved.
4
RCK_ES
This bit selects the active edge of the RCLKn pin.
0: Rising edge. (default)
1: Falling edge.
3
RD_INV
This bit determines the active level on the RDPn and RDNn pins.
0: Active high. (default)
1: Active low.
2
R_CODE
This bit selects the line code rule for the receive path.
0: HDB3 (in E1 mode). (default)
1: AMI.
1 - 0
R_MD[1:0]
These bits determines the receive system interface.
01: Receive Dual Rail NRZ Format system interface. The data is output on RDPn and RDNn in NRZ format and a 2.048 MHz (in
E1 mode) recovered clock is output on RCLKn. (default)
10: Receive Dual Rail RZ Format system interface. The data is output on RDPn and RDNn in RZ format and a 2.048 MHz (in E1
mode) recovered clock is output on RCLKn.
11: Receive Dual Rail Sliced system interface. The data is output on RDPn and RDNn in RZ format directly after passing through
the Slicer.
Address: 00CH, 04CH, 08CH, 0CCH, 10CH, 14CH, 18CH, 1CCH, (CH1~CH8)
20CH, 24CH, 28CH, 2CCH, 30CH, 34CH, 38CH, (CH9~CH15)
7CCH (CH0)
Type: Read / Write
Default Value: 00H
Bit
Name
Description
7 - 2
-
Reserved.
1 - 0
MG[1:0]
These bits select the Monitor Gain.
00: 0 dB. (default)
01: 20 dB.
10: 26 dB.
11: 32 dB.
765
432
1
0
-
RCK_ES
RD_INV
R_CODE
R_MD1
R_MD0
76543
21
0
------
MG1
MG0
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