參數(shù)資料
型號(hào)： IBMN364164CT3C-68
英文描述： x16 SDRAM
中文描述： x16內(nèi)存
文件頁(yè)數(shù)： 29/71頁(yè)
文件大?。?/td> 1251K
代理商： IBMN364164CT3C-68
IBMN364164
IBMN364404
IBMN364804
64Mb Synchronous DRAM - Die Revision C
19L3265.E35856B
1/01
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 29 of 71
Data Mask
The SDRAM has a Data Mask function that can be used in conjunction with data read and write cycles. When
the Data Mask is activated (DQM high) during a write cycle, the write operation is prohibited immediately
(zero clock latency). If the Data Mask is activated during a read cycle, the data outputs are disabled and
become high impedance after a two-clock delay, independent of CAS latency.
No Operation Command
The No Operation Command should be used in cases when the SDRAM is in a idle or a wait state. The pur-
pose of the No Operation Command is to prevent the SDRAM from registering any unwanted commands
between operations. A No Operation Command is registered when CS is low with RAS, CAS, and WE held
high at the rising edge of the clock. A No Operation Command will not terminate a previous operation that is
still executing, such as a burst read or write cycle.
Deselect Command
The Deselect Command performs the same function as a No Operation Command. Deselect Command
occurs when CS is brought high, the RAS, CAS, and WE signals become don’t cares.
Data Mask Activated during a Read Cycle
COMMAND
NOP
READ A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
DQM
: “H” or “L”
A two-clock delay before
the DQs become Hi-Z
DQs
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
DOUT A
0
DOUT A
1
(Burst Length = 4, CAS Latency = 2)
相關(guān)PDF資料
PDF描述
IBMN364164CT3C-75A x16 SDRAM
IBMN364404CT3C-260 x4 SDRAM
IBMN364404CT3C-360 x4 SDRAM
IBMN364404CT3C-75A x4 SDRAM
IBMN364804CT3C-260 x8 SDRAM
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