參數(shù)資料
型號(hào): HB52R329E22
廠商: Hitachi,Ltd.
英文描述: 256 MB Registered SDRAM DIMM(256 MB 寄存同步DRAM DIMM)
中文描述: 注冊(cè)使用256 MB SDRAM的內(nèi)存(256 MB的寄存同步的DRAM內(nèi)存)
文件頁(yè)數(shù): 52/67頁(yè)
文件大?。?/td> 630K
代理商: HB52R329E22
HB52R329E22-D
52
Mode register set to Bank-active command interval:
The interval between setting the mode register and
executing a bank-active command must be no less than l
RSA
.
CK
Command
Address
Mode
Register Set
Bank
Active
MRS
ACTV
I
RSA
BS & ROW
CODE
DQMB Control
The DQMB mask the DQ data. The timing of DQMB is different during reading and writing.
Reading:
When data is read, the output buffer can be controlled by DQMB. By setting DQMB to Low,
the output buffer becomes Low-Z, enabling data output. By setting DQMB to High, the output buffer
becomes High-Z, and the corresponding data is not output. However, internal reading operations continue.
The latency of DQMB during reading is 3 clocks.
Writing:
Input data can be masked by DQMB. By setting DQMB to Low, data can be written. In
addition, when DQMB is set to High, the corresponding data is not written, and the previous data is held.
The latency of DQMB during writing is 1 clock.
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參數(shù)描述
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