參數(shù)資料
型號(hào)： EM6617VVVST11A
元件分類： 微控制器/微處理器
英文描述： 4-BIT, MROM, 0.032768 MHz, RISC MICROCONTROLLER
封裝： STICKY TAPE
文件頁(yè)數(shù)： 30/66頁(yè)
文件大?。?/td> 759K
代理商： EM6617VVVST11A
EM6617-1
EM Microelectronic-Marin SA , 3/99 Rev. B/258
30
During automatic transmission the general INTEN bit is disabled automatically to prevent other Interrupts to
reset the standby mode. At the end of automatic transmission EM6617 leaves standby mode (
INTEN
is
automatically Enabled) and sets TestVar[3] high. TestVar[3] = 1 is signaling SWB transmission is terminated.
As soon as SWBAuto is high, the general IntEn flag is disabled until the SWBAuto goes back low.
After automatic SWB transmission
INTEN
bit becomes high. Although set to 1 via the Halt instruction the bit
INTEN
is disabled throughout the whole SWB automatic transmission. It resumes to 1 at the end of transmission
The data to be sent must be prepared in the following order:
First nibble to be sent must be written in the
RegSWBuff
register . The other nibbles must be loaded in the RAM
from address 00 (second nibble at adr.00, third at adr.01,...) up to the address with last nibble of data to be send
= "
size
" address. Max. address space for SWB is 3E ("
size
" 3E hex) what gives together with
RegSWBuff
up
to 64 nibbles (256 bits) of data to be sent. The minimum amount of data bits one can send in automatic SWB
mode is 8 . In this case the last RAM address to be sent is 00 ("size" = 00).
Once data are written into the RAM and into the RegSWBuff, the user has to load the "
size
" (adr. of the last
nibble to be send - bits size[5 :0]) into the
RegSWBSizeL
and
RegSWBSizeH
register, later register together
with SWBAuto =1 bit.
Now everything is ready for automatic serial transmission. To start the transmission one has to put the EM6617
in standby mode with the HALT instruction. When transmission is finished TESTvar[3] (can be used for
conditional jumps) becomes active High, the bit
SWBAuto
is cleared , the processor is leaving the Standby
mode and
IntEn
is switched on.
The processor now starts to execute the first instruction placed after the HALT instruction (for instance write of
RegSWBuff register to clear TESTvar[3]), except if there was a IRQ during the serial transmission. In this case
the CPU will go directly in the interrupt routine.
TestVar[3] stays high until
RegSWBuff
is rewritten. Before starting a second SWB action this bit must be
cleared by performing a dummy write on
RegSWBuff
address.
Figure 23. Automatic Serial Write Buffer Transmission
Because the data in the RAM are still present one can start transmitting the same data once again only by
recharging the RegSWBuff , RegSWBSizeL and RegSWBSizeH register together with SWBAuto bit and putting
the EM6617 in HALT mode. This will start a new transmission.
Using the SWB high impedance mask option in automatic mode. As soon as one goes into Halt mode the SWB
outputs go to ‘0’ and SWB transfer starts. At the end of the transfer the SWB outputs go immediately back into
high impedance state.
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