參數(shù)資料
型號(hào)： EDS1232AABB-75L
英文描述： SDRAM|4X1MX32|CMOS|BGA|90PIN|PLASTIC
中文描述： 內(nèi)存| 4X1MX32 |的CMOS | BGA封裝| 90PIN |塑料
文件頁數(shù)： 36/55頁
文件大?。?/td> 570K
代理商： EDS1232AABB-75L
EDS1232AABB, EDS1232AATA
Data Sheet E0205E30 (Ver. 3.0)
41
Bank active command interval
1. Same bank: The interval between the two bank active commands must be no less than tRC.
2. In the case of different bank active commands: The interval between the two bank active commands must be no
less than tRRD.
CLK
Command
Address
BS
Bank 0
Active
ACT
ROW
ACT
ROW
Bank 0
Active
tRC
Bank Active to Bank Active for Same Bank
CLK
Command
Address
BS
Bank 0
Active
Bank 3
Active
ACT
ROW:0
ACT
ROW:1
tRRD
Bank Active to Bank Active for Different Bank
Mode register set to Bank active command interval
The interval between setting the mode register and executing a bank active command must be no less than lMRD.
CLK
Command
Address
Mode
Register Set
Bank
Active
MRS
IMRD
ACT
BS & ROW
OPCODE
Mode register set to Bank active command interval
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參數(shù)描述
EDS1232AABB-75L-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM
EDS1232AASE 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits)
EDS1232AASE-60-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits)
EDS1232AASE-60L-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits)
EDS1232AASE-75-E 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:128M bits SDRAM (4M words x 32 bits)
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