參數(shù)資料
型號(hào)： DS31412N
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 28/89頁(yè)
文件大?。?/td> 0K
描述： IC 12CH DS3/3 FRAMER 349-BGA
標(biāo)準(zhǔn)包裝： 1
控制器類型： DS3/E3 調(diào)幀器
接口： LIU
電源電壓： 3.135 V ~ 3.465 V
電流 - 電源： 960mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 349-BGA 裸露焊盤
供應(yīng)商設(shè)備封裝： 349-HCBGA（27x27）
包裝： 托盤
DS3146/DS3146/DS31412 6-/8-/12-Channel DS3/E3 Framers
34 of 89
Bit 3: DS3/E3 Transmit Alarm Indication Signal (TAIS). When this bit is logic 1 in DS3 mode, the transmitter
generates DS3 AIS, which is a properly F-bit and M-bit framed 1010... data pattern with both X bits set to 1, all C
bits set to 0, and the proper P bits. When this bit is logic 1 in E3 mode, the transmitter generates an unframed all-
ones pattern. When this bit is logic 0, normal data is transmitted.
0 = do not transmit AIS
1 = transmit AIS
Bit 4: DS3/E3 Transmit Remote Alarm Indication (TRAI). When this bit is logic 1 in DS3 mode, both X bits of
each DS3 frame are set to logic 0. When this bit is logic 1 in E3 mode, the RAI bit (bit 11 of each E3 frame) is set to
logic 1. When this bit is logic 0 in DS3 mode, both X bits are set to logic 1. When this bit is logic 0 in E3 mode, the
RAI bit is set to logic 0.
0 = do not transmit RAI
1 = transmit RAI
Bit 5: Transmit DS3 Idle Signal Enable (T3IDLE). When this bit is logic 1 in DS3 mode, the transmitter generates
the DS3 idle signal instead of the normal transmit data. The DS3 idle signal is defined as a normally DS3 framed
pattern (i.e., with the proper F bits and M bits along with the proper P bits) where the information bit fields are
completely filled with a data pattern of 1100..., the C bits in Subframe 3 are set to logic 0, and both X bits are set to
logic 1. In C-Bit Parity mode, the PMDL and FEAC channels are still enabled. This bit is ignored in the E3 mode.
0 = do not transmit DS3 idle signal
1 = transmit DS3 idle signal
Bits 6, 7: E3 National Bit Control (E3SnC[1:0]). These bits determine the source of the E3 National bit (Sn). On
the receive side, the Sn bit is always routed to the T3E3IR register as well as the HDLC controller and the FEAC
controller. These bits are ignored in DS3 mode.
E3SnC1
E3SnC0
SOURCE OF THE E3 NATIONAL BIT (Sn)
0
Force the Sn bit to logic 1
0
1
Source the Sn bit from the HDLC controller
1
0
Source the Sn bit from the FEAC controller
1
Force the Sn bit to logic 0
相關(guān)PDF資料
PDF描述
DS3150TN IC LIU T3/E3/STS-1 IND 48-TQFP
DS3154N+ IC LIU DS3/E3/STS-1 QD 144CSBGA
DS3164+ IC ATM/PACKET PHY QUAD 400-BGA
DS3170+ IC TXRX DS3/E3 100-CSBGA
DS3172N+ IC TXRX DS3/E3 DUAL 400-BGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS31415 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock
DS31415_1107 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:3-Input, 4-Output, Single DPLL Timing IC with Sub-ps Output Jitter and 1588 Clock
DS31415DK 功能描述:網(wǎng)絡(luò)開發(fā)工具 DS31415 Dev Kit RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V
DS31415GN+ 制造商:Microsemi Corporation 功能描述:SINGLE DPLL TIMING IC W/APLL & 1588 CLOCK - Rail/Tube 制造商:Zarlink Semiconductor Inc 功能描述:SINGLE DPLL TIMING IC W/APLL & 1588 CLOCK - Rail/Tube 制造商:Microsemi 功能描述:DPLL 256-Pin CSBGA
DS3141N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Single DS3/E3 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*