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參數(shù)資料
| 型號： | CH7002D |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Scalable VGA to NTSC/PAL Encoder |
| 中文描述： | 可擴展顯卡至NTSC / PAL編碼器 |
| 文件頁數(shù)： | 6/36頁 |
| 文件大?。?/td> | 199K |
| 代理商： | CH7002D |
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CHRONTEL
CH7002D
6 201-0000-029 Rev6.1, 8/2/99
Functional Description
The CH7002 is a fully integrated system solution for converting analog RGB and synchronization signals from a
standard VGA source into high-quality NTSC or PAL video signals. This solution involves both hardware and
software elements, which work together, to produce an optimum TV screen image based on the original computer
generated pixel data. All essential circuitry for this conversion are integrated on chip. On-chip circuitry includes:
memory, memory control, scaling, PLL, ADC, DAC, filters, and a NTSC/PAL encoder. All internal signal
processing, including NTSC/PAL encoding, is performed using digital techniques, to ensure that the high-quality
video signals are not affected by drift issues associated with analog components. No additional adjustment is
required during manufacturing.
CH7002 is ideal for stand-alone VGA to NTSC/PAL applications, where a minimum of discrete support
components (passive components, parallel resonance 14.31818 MHz crystal) are required for full operation. The
CH7002 is designed to provide an ideal solution for computer motherboards, add-on graphics cards, TV-sets, and
scan converter boards.
Architectural Overview
The CH7002 is a complete TV output subsystem, using both hardware and software elements, to produce an image
on TV, that is virtually identical to the image that would be displayed on a monitor. Creating a compatible TV
output from a VGA input is a relatively straightforward process. This process includes a standard conversion from
RGB to YUV color space, converting from a non-interlaced to an interlaced frame sequence, then encoding the
pixel stream into NTSC or PAL compliant format. However, creating an optimum computer-generated image on a
TV screen involves a highly sophisticated process of scaling, deflickering, and filtering. This results in a
compatible TV output that displays a sharp and stable image of the right size, with minimal artifacts from the
conversion process.
As a key part of the overall system solution, the CH7002 software establishes the correct framework for the VGA
input signal to enable this process. Once the display is set to a supported resolution (either 640x480 or 800x600),
the CH7002 software may be invoked to establish the appropriate TV output display. The software then programs
the various timing parameters of the VGA controller to create an output signal that will be compatible with the
chosen resolution, operating mode, and TV format. Adjustments performed in software include pixel clock rates,
total pixels per line, and total lines per frame. By performing these adjustments in software, the CH7002 can render
a superior TV image, without the added cost of a full frame buffer memory, normally used to implement features
such as scaling and full synchronization. Without this added system software, TV output solutions can only
guarantee compatible operation in VGA standard mode 12 (640x480x16 color, 60 Hz).
The CH7002 hardware accepts direct VGA outputs (analog RGB inputs), which are digitized on a pixel-by-pixel
basis by three 8-bit video A/D converters. The digitized RGB inputs are then color space converted into YUV in 4-
2-2 format (encoded into luminance (Y) and color-difference (U,V) signals) and stored in a line buffer memory.
The stored pixels are fed into a block where scan-rate conversion, underscan scaling, and 3-line vertical flicker
filtering are performed. The scan-rate converter transforms the VGA horizontal scan-rate to either NTSC or PAL
scan-rates; the vertical flicker filter eliminates flicker at the output, while the underscan scaling reduces the size of
the displayed image to fit onto a TV screen. The resulting YUV signals are filtered through digital filters to
minimize aliasing problems. The digital encoder receives the filtered signals and transforms the signals into
composite and S-Video outputs, which are converted by the three 8-bit DACs into analog outputs.
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| CH7002D-V | Scalable VGA to NTSC/PAL Encoder |
| CH7004C | Digital PC to TV Encoder with Macrovision |
| CH7004C-T | Digital PC to TV Encoder with Macrovision |
| CH7004C-V | Digital PC to TV Encoder with Macrovision |
| CH7007A | DIGITAL PC TO TV ENCODER WITH MACROVISION |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CH7002D-V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Scalable VGA to NTSC/PAL Encoder |
| CH7003B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7003B-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7003B-V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7004C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder with Macrovision |
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