- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379886 > CH7002D (Electronic Theatre Controls, Inc.) Scalable VGA to NTSC/PAL Encoder PDF資料下載
參數(shù)資料
| 型號： | CH7002D |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Scalable VGA to NTSC/PAL Encoder |
| 中文描述： | 可擴展顯卡至NTSC / PAL編碼器 |
| 文件頁數(shù)： | 17/36頁 |
| 文件大?。?/td> | 199K |
| 代理商： | CH7002D |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁當前第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
CHRONTEL
CH7002D
201-0000-029 Rev 6.1, 8/2/99
17
I
2
C Port Operation
The CH7002 contains a standard I
2
C control port, through which the control registers can be written and read. This
port is comprised of a two-wire serial interface, pins SD (bi-directional) and SC, which can be connected directly to
the SDB and SCB buses as shown in
Figure 17
.
The Serial Clock line (SC) is input only and is driven by the output buffer of the master device (also shown in Figure
17). The CH7002 acts as a slave, and generation of clock signals on the bus is always the responsibility of the master
device. When the bus is free, both lines are HIGH. The output stages of devices connected to the bus must have an
open-drain or open-collector to perform the wired-AND function. Data on the bus can be transferred up to 400
kbit/s.
Figure 17: Connection of Devices to the Bus
Electrical Characteristics for Bus Devices
The electrical specifications of the bus devices’ inputs and outputs and the characteristics of the bus lines connected
to them are shown in
Figure 17
. A pull-up resistor (R
P
) must be connected to a 5V +/- 10% supply. The CH7002 is
a device with input levels related to VDD.
Maximum and minimum values of pull-up resistor (R
P
)
The value of R
P
depends on the following parameters:
Supply voltage
Bus capacitance
Number of devices connected (input current + leakage current = I
input
)
The supply voltage limits the minimum value of resistor R
P
due to the specified minimum sink current of 3mA at
V
OLmax
= 0.4 V for the output stages.
R
P
>= (V
DD
– 0.4) / 3 (R
P
in k
)
The bus capacitance is the total capacitance of wire, connections and pins. This capacitance limits the maximum
value of R
P
due to the specified rise time. The equation for RP is shown below:
R
P
<= 10
3
/C (where R
P
is in k
and C, the total capacitance, is in pF)
The maximum HIGH level input current of each input/output connection has a specified maximum value of 10
μ
A.
Due to the desired noise margin of 0.2V
DD
for the HIGH level, this input current limits the maximum value of R
P
.
The R
P
limit depends on V
DD
and is shown below:
R
P
<= (100 x V
DD
)/ I
input
(where R
P
is in k
and I
input
is in
μ
A)
SCLK
IN2
DATA
IN2
DATAN2
OUT
SCB (Serial Clock Bus)
SDB (Serial Data Bus)
+VDD
R
P
SLAVE
SCLK
IN1
DATA
IN1
DATAN2
OUT
SLAVE
SCLK
OUT
FROM
MASTER
DATA IN
MASTER
DATAN2
OUT
MASTER
BUS MASTER
SC
SD
相關PDF資料 |
PDF描述 |
|---|---|
| CH7002D-V | Scalable VGA to NTSC/PAL Encoder |
| CH7004C | Digital PC to TV Encoder with Macrovision |
| CH7004C-T | Digital PC to TV Encoder with Macrovision |
| CH7004C-V | Digital PC to TV Encoder with Macrovision |
| CH7007A | DIGITAL PC TO TV ENCODER WITH MACROVISION |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| CH7002D-V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Scalable VGA to NTSC/PAL Encoder |
| CH7003B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7003B-T | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7003B-V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder |
| CH7004C | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Digital PC to TV Encoder with Macrovision |
發(fā)布緊急采購，3分鐘左右您將得到回復。