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參數(shù)資料
| 型號(hào)： | CH7002D |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Scalable VGA to NTSC/PAL Encoder |
| 中文描述： | 可擴(kuò)展顯卡至NTSC / PAL編碼器 |
| 文件頁數(shù)： | 5/36頁 |
| 文件大小： | 199K |
| 代理商： | CH7002D |
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CHRONTEL
Table 1. Pin Description
(continued)
CH7002D
201-0000-029 Rev 6.1, 8/2/99
5
Note:
For complete information concerning external signal connections, terminations, and system design considerations,
refer to the
Application Information
section.
44-Pin
PLCC
Type
Symbol
Description
36
In
ADDR/FF0
I
2
C Address Select/Flicker Filter (bit 0)(internal pull-up)
The function of this dual use pin is determined by the state of the PMODE pin.
When the PMODE pin is kept high (default), this pin becomes ADDR or I
2
C
Address Select, which corresponds to bits
1
and
0
of the I
2
C device address
(see the
I
2
C Control Port Operation
section for details), creating an address
selection as follows:
ADDR I
2
C Address Selected
1 11101
01
= 75H = 117
0 11101
10
= 76H = 118
When the PMODE pin is pulled low, this pin becomes FF0 or Flicker Filter
select, the function of which corresponds to bit 0 of the Flicker Filter register,
which selects between the following:
FF0 Flicker Filter Mode
0 0:1:0 No filtering
1 1:2:1 Moderate filtering (default)
This pin-programming is “mux-ed” with the Flicker Filter register (bit 0). All
related modes are described under the
Registers and Programming
section.
Programming Mode (internal pull-up)
The PMODE pin selects between the two alternative programming modes for
the CH7002, which in turn alters the function of five additional pins
(RESET/DM0, SD/DM1, SC/DM2, XCLK/SD3, and ADDR/FF0). When
PMODE is kept high (default), the chip is placed in I
2
C programming mode.
When PMODE is pulled low, the chip is placed in direct pin programming
mode.
Internal Voltage Reference
VREF2 provides a typical 2.5V reference that is used as an internal bias to
the ADCs. A 0.1
μ
F decoupling capacitor should be connected between
VREF2 and ground.
ADC Voltage Reference Input / Output
VREF1 provides a typical 1.235V reference that sets the RGB input full scale
at 0.75V. A 0.1
μ
F decoupling capacitor should be connected between
VREF1 and ground. VREF1 may also be forced by external reference, where
(VFS is the full scale input voltage):
VFS ~ VREF1 * 0.75/1.235
No Connect
38
In
PMODE
41
In
VREF2
43
In
VREF1
19, 20
NC
NC
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