- 您現在的位置：買賣IC網 > PDF目錄369546 > BU-62864 MIL-STD-1553 Components |PCI-Enhanced Mini-ACE? PDF資料下載
參數資料
| 型號： | BU-62864 |
| 英文描述： | MIL-STD-1553 Components |PCI-Enhanced Mini-ACE? |
| 中文描述： | 符合MIL - STD - 1553器件|的PCI增強迷你ACE論壇？ |
| 文件頁數： | 50/56頁 |
| 文件大?。?/td> | 368K |
| 代理商： | BU-62864 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁當前第50頁第51頁第52頁第53頁第54頁第55頁第56頁
50
Data Device Corporation
www.ddc-web.com
BU-62743/62843/62864
A-03/03-1M
C/BE[3]# (I)
32
Bus Command and Byte Enables.These signals are multiplexed on the same pins.
During the address phase of a bus operation, these pins identify the bus command, as
shown in the table below. During the data phase of a bus operation, these pins are
used as Byte Enables, with C/BE[0]# enabling byte 0 (LSB) and C/BE[3]# enabling byte
3 (MSB).The PACE responds to the following PCI commands:
C/BE[3:0]#
DESCRIPTION (DURING ADDRESS PHASE)
0
1
1
0
Memory Read
0
1
1
1
Memory Write
1
0
1
0
Configuration Read
1
0
1
1
Configuration Write
1
1
0
0
Memory Read Multiple
1
1
1
0
Memory Read Line
1
1
1
1
Memory Write and Invalidate
Note that the last three memory commands are aliased to the basic memory com-
mands: Memory Read and Memory Write.
C/BE[2]# (I)
43
C/BE[1]# (I)
52
C/BE[0]# (I)
61
PAR (I/O)
51
Clock input.The rising edge of this signal is the reference upon which all other clock signals
are based, with the exception of RST# and INTA#.The maximum frequency accepted is 33
MHz and the minimum is 0 Hz.
PCI_CLK (I)
30
Parity.This signal is even parity across the entire AD[31:0] field along with the
C/BE[3:0]# field.The parity is stable in the clock following the address phase and is
sourced by the Bus Master. During the data phase for write operations, the Bus Master
sources this signal on the clock following IRDY# active. During the data phase for read
operations, this signal is sourced by the Target and is valid on the clock following
TRDY# active.The PAR signal therefore has the same timing as AD[31:0], delayed by
one clock.
TABLE 71. PCI BUS ADDRESS AND DATA SIGNALS (CONTINUED)
SIGNAL NAME
DESCRIPTION
PIN (F & G PACKAGE)
相關PDF資料 |
PDF描述 |
|---|---|
| BU-6486NEW | MIL-STD-1553 Components |Mini-ACE? Mark3 |
| BU-6586NEW | MIL-STD-1553 Components |PCI Mini-ACE? Mark3 |
| BU-69200 | MIL-STD-1553 Components |ACE-Core |
| BU05MC | COMMON MODE CHOKE COILS (FOR DC AND SIGNAL LINES) SMD TYPE |
| BU105 | Transient Voltage Suppressor Diodes |
相關代理商/技術參數 |
參數描述 |
|---|---|
| BU-62-9 | 功能描述:測試電夾 INSULATOR FOR 60 SERIES WHITE RoHS:否 制造商:Pomona Electronics 類型:Minigrabber clip 顏色:Black |
| BU-62-BLU | 制造商:Mueller Electric Company 功能描述:Cable Accessories Insulator Vinyl Blue |
| BU-62S-0 | 功能描述:INSULATOR FOR BU-60 SERIES BLK 制造商:mueller electric co 系列:BU 零件狀態(tài):有效 類型:測試夾，引線，探針 配件類型:絕緣體，黑色 配套使用產品/相關產品:鱷魚夾：BU-60，BU-60C，BU-60CS，BU-60PR2，BU-60S，BU-60TBO，BU-60U，BU-60X，BU-61 規(guī)格:- 標準包裝:1 |
| BU-62S-2 | 功能描述:INSULATOR FOR BU-60 SERIES RED 制造商:mueller electric co 系列:BU 零件狀態(tài):有效 類型:測試夾，引線，探針 配件類型:絕緣體，紅色 配套使用產品/相關產品:鱷魚夾：BU-60，BU-60C，BU-60CS，BU-60PR2，BU-60S，BU-60TBO，BU-60U，BU-60X，BU-61 規(guī)格:- 標準包裝:1 |
| BU-63-0 | 功能描述:測試電夾 Black Insul Alligato RoHS:否 制造商:Pomona Electronics 類型:Minigrabber clip 顏色:Black |
發(fā)布緊急采購，3分鐘左右您將得到回復。