參數(shù)資料
型號: BU-6586NEW
英文描述: MIL-STD-1553 Components |PCI Mini-ACE? Mark3
中文描述: 符合MIL - STD - 1553器件|迷你的PCI ACE論壇? Mark3
文件頁數(shù): 1/60頁
文件大?。?/td> 410K
代理商: BU-6586NEW
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
FOR MORE INFORMATION CONTACT:
Technical Support:
1-800-DDC-5757 ext. 7234
FEATURES
Fully Integrated 3.3 Volt, 1553 A/B
Notice 2 Terminal
Worlds first all 3.3 Volt terminal (No
other power supplies required)
Transceiver power-down option (64K
RAM Versions Only)
Smallest 0.88" X 0.88", 0.130" Max
Height CQFP
80-pin Ceramic Flat pack or Gull
Wing Package
Enhanced Mini-ACE Architecture
Multiple Configurations:
- RT-only, 4K RAM
- BC/RT/Monitor, 4K RAM
- BC/RT/Monitor, 64K RAM
Supports 1553A/B Notice 2, McAir,
STANAG 3838 Protocols
MIL-STD-1553, McAir, and MIL-STD-1760
Transceiver Options
Highly Flexible Host Side Interface
Compatible With Mini-ACE and ACE
Generations
Highly Autonomous BC with Built-In
Message Sequence Controller
Choice of Single, Double, and
Circular RT Buffering Options
Selective Message Monitor
Comprehensive Built-In Self-Test
Choice Of 10, 12, 16, or 20 MHz Clock
Inputs
Software Libraries and Drivers
available for Windows 9x/2000/XP
Windows NT,VxWorks and Linux
Available with Full Military
Temperature Range and Screening
DESCRIPTION
The Mini-ACE Mark3 is the world's first MIL-STD-1553 terminal pow-
ered entirely by 3.3 volts, thus eliminating the need for a 5 volt power
supply. With a package body of 0.88 inches square and a gull wing
"toe-to-toe" dimension of 1.13 inches max, the Mark3 is the industry's
smallest ceramic gull-lead 1553 terminal, enabling its use in applica-
tions where PC board space is at a premium.
The Mark3 integrates dual transceiver, protocol logic, and either 4K or
64K words of internal RAM. The Mark3's architecture is identical to
that of the Enhanced Mini-ACE, and most features are functionally
and software compatible with the previous Mini-ACE (Plus) and ACE
generations.
A salient feature of the Mark3 is its advanced bus controller architec-
ture. This provides methods to control message scheduling, the
means to minimize host overhead for asynchronous message inser-
tion, facilitate bulk data transfers and double buffering, and support
various message retry and bus switching strategies.
The Mark3's remote terminal architecture provides flexibility in meet-
ing all common MIL-STD-1553 protocols. The choice of RT data
buffering and interrupt options provides robust support for synchro-
nous and asynchronous messaging, while ensuring data sample
consistency and supporting bulk data transfers. The Mark3's monitor
mode provides true message monitoring, and supports filtering on an
RT address/T-R bit/subaddress basis.
The Mark3 incorporates fully autonomous built-in self-tests of its
internal protocol logic and RAM. The Mark3 terminals provide the
same flexibility in host interface configurations as the ACE/Mini-ACE,
along with a reduction in the host processor's worst case holdoff time.
2002 Data Device Corporation
BU-64743/64843/64863
Mini-ACE MARK3
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