- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄375384 > AX88796BLI (ASIX Electronics Corporation) Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller PDF資料下載
參數(shù)資料
| 型號(hào)： | AX88796BLI |
| 廠商： | ASIX Electronics Corporation |
| 英文描述： | Low-pin-count Non-PCI 8/16-bit 10/100M Fast Ethernet Controller |
| 中文描述： | 低引腳數(shù)的非PCI 16位產(chǎn)品10/100M自適應(yīng)快速以太網(wǎng)控制器 |
| 文件頁(yè)數(shù)： | 43/82頁(yè) |
| 文件大小： | 519K |
| 代理商： | AX88796BLI |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)當(dāng)前第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)
ASIX ELECTRONICS CORPORATION
43
AX88796BLF / AX88796BLI
5.1.32 Current Page Register (CPR)
Page1 Offset 07H (Read/Write)
Field
Name
Description (Default = 4Dh)
7:0
CPR
The Buffer Management Logic as a backup register for reception uses this register
internally. CURR contains the address of the first buffer to be used for a packet reception
and is used to restore DMA pointers in the event of receive errors. This register is initialized
to the same value as PSTART and should not be written to again unless the controller is
Reset.
5.1.33 Multicast Address Register 0 (MAR0)
Page1 Offset 08H (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR0
Multicast Address Register 0
5.1.34 Multicast Address Register 1 (MAR1)
Page1 Offset 09H (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR1
Multicast Address Register 1
5.1.35 Multicast Address Register 2 (MAR2)
Page1 Offset 0AH (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR2
Multicast Address Register 2
5.1.36 Multicast Address Register 3 (MAR3)
Page1 Offset 0BH (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR3
Multicast Address Register 3
5.1.37 Multicast Address Register 4 (MAR4)
Page1 Offset 0CH (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR4
Multicast Address Register 4
5.1.38 Multicast Address Register 5 (MAR5)
Page1 Offset 0DH (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR5
Multicast Address Register 5
5.1.39 Multicast Address Register 6 (MAR6)
Page1 Offset 0EH (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR6
Multicast Address Register 6
5.1.40 Multicast Address Register 7 (MAR7)
Page1 Offset 0FH (Read/Write)
Field
Name
Description (Default = 00h)
7:0
MAR7
Multicast Address Register 7
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AX88872P | 10/100BASE Dual Speed “Swipeater” Controller |
| AX9902MS | 2N and 2P-Channel Enhancement Mode Power MOSFET |
| AX9902MSA | 2N and 2P-Channel Enhancement Mode Power MOSFET |
| AXC-051 | ACTIVE FILTER FOR RIPPLE ATTENUATION 5A |
| AXC-051-R | ACTIVE FILTER FOR RIPPLE ATTENUATION 5A |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AX88796C | 制造商:ASIX 制造商全稱:ASIX 功能描述:Low-Power SPI or Non-PCI Ethernet Controller |
| AX88796CLF | 制造商:ASIX Electronics Corporation 功能描述: |
| AX88796L | 制造商:ASIX 制造商全稱:ASIX 功能描述:3-in-1 Local Bus Fast Ethernet Controller |
| AX88796LF | 制造商:ASIX 功能描述:10/100 MAC |
| AX88850 | 制造商:ASIX 制造商全稱:ASIX 功能描述:100BASE-TX/FX Repeater Controller |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。