參數(shù)資料
型號： AT89C51SND2C-7FTUL
廠商： Atmel
文件頁數(shù)： 92/160頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 64K MP3 100BGA
標準包裝： 260
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： I²C，IDE/ATAPI，MMC，SPI，UART/USART，USB
外圍設(shè)備： 音頻，I²S，MP3，PCM，POR，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.3 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-TFBGA
包裝： 托盤
其它名稱： AT89C51SND2C7FTUL
7-32
DS785UM1
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
VLineStep = 640 x 4bpp/32
7.4.10.2 PixelMode
Pixel data is transferred from the FIFO to the Video Pixel Mux two 32-bit words at a time (total
of 64 bits). Bits[2:0] of the “PixelMode” register specify the pixel depth as shown in Table 7-
11. The Video Pixel MUX uses the “PixelMode” register to determine how many pixels are
contained in the 64 bits of data. The Video Pixel Mux extracts pixel data from the 64-bits and
passes that pixel data to the BLINK logic one pixel at a time.
Note: All other combinations for these three bits are illegal.
7.4.11 Blink Logic
The blink logic facilitates blinking of individual pixels as they move through the video pipeline.
The blink frequency is controlled by the “BlinkRate” register. All blinking pixels blink at the
same rate.
7.4.11.1 BlinkRate
This value is used to control the number of video frames that occur before the pixel value that
is assigned to blink is switched between its non-blinked and blinked values. The actual rate is
calculated by:
Blink cycle = 2 x (1 / VCLK) x HClkTotal x VLinesTotal x (255 - BlinkRate)
where:
VCLK is the basic clock rate of the video logic
HClkTotal is the value contained in the “HClkTotal” register
VLinesTotal is the value contained in the “VLinesTotal” register
BlinkRate is the value contained in the “BlinkRate” register
7.4.11.2 Defining Blink Pixels
A blink pixel must be defined before the blink logic is applied to a given pixel. The
“BlinkPattrn” and “PattrnMask” registers are used to define the blink pixels.
Table 7-11. Bits P[2:0] in the PixelMode Register
bit P2
bit P1
bit P0
Function
0
Pixel Multiplexor disabled
0
1
4 bits per pixel
0
1
0
8 bits per pixel
0
16 bits per pixel
1
0
24 bits per pixel
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT89C51-W 功能描述:8位微控制器 -MCU Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
AT89C52 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 8K Bytes Flash
AT89C52_00 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 8K Bytes Flash
AT89C52_99 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 8K Bytes Flash
AT89C52-12AA 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 8K Bytes Flash
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