參數(shù)資料
型號： AT89C51SND2C-7FTUL
廠商： Atmel
文件頁數(shù)： 73/160頁
文件大?。?/td> 0K
描述： IC 8051 MCU FLASH 64K MP3 100BGA
標(biāo)準(zhǔn)包裝： 260
系列： 89C
核心處理器： 8051
芯體尺寸： 8-位
速度： 40MHz
連通性： I²C，IDE/ATAPI，MMC，SPI，UART/USART，USB
外圍設(shè)備： 音頻，I²S，MP3，PCM，POR，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 64KB（64K x 8）
程序存儲器類型： 閃存
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.3 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 100-TFBGA
包裝： 托盤
其它名稱： AT89C51SND2C7FTUL
7-16
DS785UM1
Copyright 2007 Cirrus Logic
Raster Engine With Analog/LCD Integrated Timing and Interface
EP93xx User’s Guide
7
Assuming that pixel input value 0 is off, setting raster engine base + grayscale LUTx offset +
0x00, 0x20, 0x40, and 0x60 to all ‘0’s ensures that a 0 pixel never turns on. Assuming that
pixel 7 is full on, setting raster engine base + grayscale LUTx offset + 0x1C, 0x3C, 0x5C, and
0x7C to all ‘1’s ensures that the value is always on. Table 7-6 shows the format for
programming.
7.4.8.1 HORZ_CNT3, HORZ_CNT4 Counters
These free running counters increment after displaying each pixel.
7.4.8.2 VERT_CNT3, VERT_CNT4 Counters
These free running counters increment at the end of every vertical line.
7.4.8.3 FRAME_CNT3, FRAME_CNT4 Counters
These free running counters increment at the end of each frame.
The GrySclLUT supports 3-bit pixel input. Each of the pixel combinations can define a unique
combination of VERT, HORZ and FRAME counters, which provides for maximum flexibility in
defining the rate at which a given pixel is manipulated as it is being displayed on the screen.
7.4.8.4 HORZ_CNTx (pixel) timing
This timing is controlled by the HORZ_CNTx counter and will indicate what pixel count values
will cause a given pixel to be turned on. It is possible to have a pixel turned on for all HORZ
counts, zero HORZ counts, or a defined pattern of HORZ counts. This counter is incremented
by the pixel clock.
7.4.8.5 VERT_CNTx (line) timing
This timing is controlled by the VERT_CNTx counters and will indicate what line count values
will cause a given pixel to be turned on. It is possible to have a pixel turn on for all VERT
counts, zero VERT counts, or a defined pattern of VERT counts. This counter is incremented
at the end of each line.
7.4.8.6 FRAME_CNTx timing
This timing is controlled by the FRAME_CNTx counters and will indicate when a full frame of
video has been displayed. It is possible to have a pixel turn on for all FRAME counts, zero
frame counts, or a combination of frame counts. This counter is incremented at the end of
each frame.
The GrySclLUT combines all of the above information into a single table. In this way, it is
possible to define a pixel to be on in all conditions (all HORZ, VERT, and FRAME counts),
zero conditions, or any combination.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AT89C51-W 功能描述:8位微控制器 -MCU Microcontroller RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
AT89C52 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 8K Bytes Flash
AT89C52_00 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 8K Bytes Flash
AT89C52_99 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with 8K Bytes Flash
AT89C52-12AA 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-Bit Microcontroller with 8K Bytes Flash
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