參數(shù)資料
型號(hào): AM49BDS640AH
廠商: Spansion Inc.
英文描述: Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
中文描述: 堆疊多芯片封裝(MCP),閃存和1.8伏,只有同時(shí)讀/寫(xiě)移動(dòng)存儲(chǔ)芯片的CMOS
文件頁(yè)數(shù): 70/84頁(yè)
文件大?。?/td> 763K
代理商: AM49BDS640AH
68
Am49BDS640AH
December 5, 2003
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Notes:
1. The timings are similar to synchronous read timings.
2. VA = Valid Address. Two read cycles are required to determine status. When the Embedded Algorithm operation is complete, the
toggle bits will stop toggling.
3. RDY is active with data (A18 = 0 in the Configuration Register). When A18 = 1 in the Configuration Register, RDY is active one
clock cycle before data.
Figure 39.
Synchronous Data Polling Timings/Toggle Bit Timings
CE#
CLK
AVD#
Addresses
OE#
Data
RDY
Status Data
Status Data
VA
VA
t
IACC
t
IACC
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE# to toggle
DQ2 and DQ6.
Figure 40.
DQ2 vs. DQ6
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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