參數(shù)資料
型號(hào)： AM49BDS640AH
廠商： Spansion Inc.
英文描述： Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write
中文描述： 堆疊多芯片封裝（MCP），閃存和1.8伏，只有同時(shí)讀/寫移動(dòng)存儲(chǔ)芯片的CMOS
文件頁數(shù)： 65/84頁
文件大?。?/td> 763K
代理商： AM49BDS640AH
December 5, 2003
Am49BDS640AH
63
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Notes:
1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.
2. “In progress” and “complete” refer to status of program operation.
3. A21–A12 are don’t care during command sequence unlock cycles.
4. Addresses are latched on the first of either the rising edge of AVD# or the active edge of CLK.
5. Either CE# or AVD# is required to go from low to high in between programming command sequences.
6. The Synchronous programming operation is dependent of the Set Device Read Mode bit in the Configuration Register. The
Configuration Register must be set to the Synchronous Read Mode.
Figure 33.
Synchronous Program Operation Timings: WE# Latched Addresses
OE#
CE#f
Data
Addresses
AVD#
WE#
CLK
V
CC
f
555h
PD
t
WC
t
WPH
t
WP
PA
t
VCS
t
DH
t
CH
In
Progress
t
WHWH1
VA
Complete
VA
Program Command Sequence (last two cycles)
Read Status Data
t
DS
t
AVDP
A0h
t
ACS
t
CAS
t
ACH
t
AVCH
t
CSW
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