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參數(shù)資料
| 型號： | AM49BDS640AH |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multichip Package (MCP), Flash Memory and pSRAM CMOS 1.8 Volt-only Simultaneous Read/Write |
| 中文描述： | 堆疊多芯片封裝（MCP），閃存和1.8伏，只有同時讀/寫移動存儲芯片的CMOS |
| 文件頁數(shù)： | 57/84頁 |
| 文件大小： | 763K |
| 代理商： | AM49BDS640AH |
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December 5, 2003
Am49BDS640AH
55
A D V A N C E I N F O R M A T I O N
AC CHARACTERISTICS
Note:
Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence
has been written with A18=0; device will output RDY with valid data.
Figure 24.
Standard Handshake Burst Suspend at address 3Fh (starting address 3Dh or earlier)
Note:
Figure assumes 6 wait states for initial access and synchronous read. The Set Configuration Register command sequence
has been written with A18=0; device will output RDY with valid data.
1) Address is 3Eh or offset by a multiple of 64 (40h)
2) Address is 3Fh or offset by a multiple of 64 (40h)
Figure 25.
Standard Handshake Burst Suspend at address 3Eh/3Fh (without a valid Initial Access)
Addresses
A(3D)
AVD#
OE#
Data
RDY
D(3F)
D(3F)
D(3F)
D(4D)
Suspend
9
Resume
x+1
t
ACC
t
RACC
t
OES
t
OES
t
CKA
t
CKA
D(3D)
t
RACC
1
2
3
4
5
6
7
8
x
x+2
x+3
x+4
x+5
CLK
t
RACC
D(3E)
D(3F)
t
OES
t
CKZ
Addresses(1)
A(3E)
AVD#
CLK
1
2
3
4
5
6
7
x+1
x+2
x+3
x+4
x+5
x+6
x
OE#
Data(1)
Addresses(2)
Data(2)
RDY(2)
RDY(1)
D(3E)
D(3F)
D(41)
D(40)
D(42)
Suspend
Resume
t
OES
t
ACC
t
RACC
t
CKZ
t
OES
t
OES
t
CKA
A(3F)
8
D(3F)
t
RACC
t
RACC
t
RACC
t
RACC
t
RACC
D(40)
D(42)
D(41)
D(43)
D(3E)
D(3F)
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