- 您現(xiàn)在的位置：買(mǎi)賣IC網(wǎng) > PDF目錄1901 > ADV7194KSTZ (Analog Devices Inc)IC ENCODER VIDEO EXT-10 80-LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | ADV7194KSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 39/69頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC ENCODER VIDEO EXT-10 80-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | DVD，視頻，多媒體 |
| 電壓 - 電源，模擬： | 3.3 V ~ 5 V |
| 電壓 - 電源，數(shù)字： | 3.3 V ~ 5 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 80-LQFP |
| 供應(yīng)商設(shè)備封裝： | 80-LQFP（14x14） |
| 包裝： | 托盤(pán) |
| 產(chǎn)品目錄頁(yè)面： | 788 (CN2011-ZH PDF) |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)當(dāng)前第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)
ADV7194
–44–
REV. A
BRIGHTNESS DETECT REGISTER
(Address (SR5–SR0) = 34H)
The Brightness Detect Register is an 8-bit-wide register used only
to read back data in order to monitor the brightness/darkness of
the incoming video data on a eld-by-eld basis. The brightness
information is read from the I
2C and based on this information,
the color controls or the gamma correction controls may be
adjusted.
The luma data is monitored in the active video area only. The
average brightness I
2C register is updated on the falling edge of
every
VSYNC signal.
OUTPUT CLOCK REGISTER (OCR9–0)
(Address (SR4–SR0) = 35H)
The Output Clock Register is an 8-bit-wide register. Figure 93
shows the various operations under the control of this register.
OCR07
OCR06
OCR05
OCR04
OCR03
OCR02
OCR01
OCR00
OCR07
ZERO MUST BE
WRITTEN TO
THIS BIT
CLKOUT
PIN CONTROL
0
ENSABLED
1
DISABLED
OCR01
OCR06 – OCR04
ONE MUST BE
WRITTEN TO
THESE BITS
OCR03 – OCR02
ZERO MUST BE
WRITTEN TO
THESE BITS
OCR00
ZERO MUST BE
WRITTEN TO
THIS BIT
Figure 93. Mode Register 10 (MR10)
OCR BIT DESCRIPTION
Reserved (OCR00)
A Logic 0 must be written to this bit.
CLKOUT Pin Control (OCR01)
This bit enables the CLKOUT pin when set to 1 and, there-
fore, outputs a 54 MHz clock generated by the internal PLL.
The PLL and 4
× Oversampling have to be enabled for this con-
trol to take effect, (MR61 = 0; MR16 = 1).
Reserved (OCR02–OCR03)
A Logic 0 must be written to these bits.
Reserved (OCR04–OCR06)
A Logic 1 must be written to these bits.
Reserved (OCR07)
A Logic 0 must be written to this bit.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7202KSTZ | IC CODEC VIDEO 10BIT 64LQFP |
| ADV7311KST | IC VID ENC 6-12BIT DAC'S 64LQFP |
| ADV7321KSTZ | IC VID ENC 6-12BIT DAC'S 64LQFP |
| ADV7343BSTZ | IC ENCODER VIDEO W/DAC 64-LQFP |
| ADV7391BCPZ | IC ENCODER VIDEO W/DAC 32LFCSP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7194KSTZ | 制造商:Analog Devices 功能描述:TV / Video IC |
| ADV7195 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs and 10-Bit Data Input |
| ADV7195KS | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 11-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:MULTI-FORMAT VID+PROGSCAN/HDTV ENCODERIC - Bulk |
| ADV7195KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs and 10-Bit Data Input |
| ADV7195KSZ | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 11-Bit 52-Pin MQFP |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。