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參數(shù)資料
| 型號： | ADV7177KSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 29/44頁 |
| 文件大小： | 0K |
| 描述： | IC DAC VIDEO NTSC 3-CH 44MQFP |
| 產(chǎn)品變化通告： | ADV7xxx Obsolescence 16/Jan/2012 |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 類型： | 視頻編碼器 |
| 應(yīng)用： | 機頂盒，電視 |
| 電壓 - 電源，模擬： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應(yīng)商設(shè)備封裝： | 44-MQFP（10x10） |
| 包裝： | 帶卷 (TR) |
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ADV7177/ADV7178
Rev. C | Page 35 of 44
CLOSED CAPTIONING
The ADV7177/ADV7178 support closed captioning, which
conforms to the standard television synchronizing waveform
for color transmission. Closed captioning is transmitted during
the blanked active line time of Line 21 of the odd fields and
Line 284 of even fields.
Closed captioning consists of a 7-cycle sinusoidal burst that is
frequency and phase locked to the caption data. After the clock
run-in signal, the blanking level is held for 2 data bits and is
followed by a Logic 1 start bit. The start bit is followed by16 bits
of data. These consist of two, 8-bit bytes, seven data bits and one
odd parity bit. The data for these bytes is stored in closed
captioning Data Registers 0 and 1.
The ADV7177/ADV7178 also supports the extended closed
captioning operation, which is active during even fields, and is
encoded on Scan Line 284. The data for this operation is stored
in closed captioning extended Data Registers 0 and 1. All clock
run-in signals and timing to support closed captioning on
Line 21 and Line 284 are generated automatically by the
ADV7177/ ADV7178. All pixels inputs are ignored during
Line 21 and Line 284.
FCC Code of Federal Regulations (CFR) 47 Section 15.119 and
EIA608 describe the closed captioning information for Line 21
and Line 284.
The ADV7177/ADV7178 uses a single buffering method.
This means that the closed captioning buffer is only 1 byte
deep, therefore there is no frame delay in outputting the closed
captioning data unlike other 2-byte-deep buffering systems.
The data must be loaded at least one line before (Line 20 or
Line 283) it is outputted on Line 21 and Line 284. A typical
implementation of this method is to use VSYNC to interrupt
a microprocessor, which in turn loads the new data (2 bytes)
every field. If no new data is required for transmission, zeros
must be inserted in both data registers; this is called nulling.
It is also important to load control codes, all of which are
double bytes on Line 21, or a TV does not recognize them. If
you have a message such as “Hello World,” which has an odd
number of characters, it is important to pad it out to an even
number to include the end-of-caption, 2-byte control code in
the same field.
12.91
s
S
T
ART
P
ARITY
P
ARITY
D0–D6
50 IRE
40 IRE
FREQUENCY = FSC = 3.579545MHz
AMPLITUDE = 40 IRE
REFERENCE COLOR BURST
(9 CYCLES)
10.5 ± 0.25
s
10.003
s
33.764
s
27.382
s
00228-044
Figure 44. Closed Captioning Waveform (NTSC)
相關(guān)PDF資料 |
PDF描述 |
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| ADV7179KCPZ-REEL | IC ENCODER VID NTSC/PAL 40LFCSP |
| ADV7181CBSTZ | IC VIDEO DECODER SDTV RGB 64LQFP |
| ADV7181DWBCPZ-RL | IC VIDEO DECODER SD/HD 64LFCSP |
| ADV7183BBSTZ | IC VIDEO DECODER NTSC 80-LQFP |
| ADV7184BSTZ | IC DECODER VID SDTV MULTI 80LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7178 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7178KS | 制造商:Analog Devices 功能描述: |
| ADV7178KS-REEL | 制造商:Analog Devices 功能描述: |
| ADV7179 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179BCP | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 10-Bit 40-Pin LFCSP EP 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
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