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參數(shù)資料
| 型號： | ADV7177KSZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 25/44頁 |
| 文件大小： | 0K |
| 描述： | IC DAC VIDEO NTSC 3-CH 44MQFP |
| 產(chǎn)品變化通告： | ADV7xxx Obsolescence 16/Jan/2012 |
| 標準包裝： | 800 |
| 類型： | 視頻編碼器 |
| 應用： | 機頂盒，電視 |
| 電壓 - 電源，模擬： | 3 V ~ 3.6 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應商設備封裝： | 44-MQFP（10x10） |
| 包裝： | 帶卷 (TR) |
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ADV7177/ADV7178
Rev. C | Page 31 of 44
MR2 BIT DESCRIPTION
Square Pixel Control (MR20)
This bit is used to set up square pixel mode. This is available in
slave mode only. For NTSC, a 24.5454 MHz clock must be
supplied. For PAL, a 29.5 MHz clock must be supplied.
Active Video Line Duration (MR23)
This bit switches between two active video line durations. A 0
selects CCIR Rec. 601 (720 pixels PAL/NTSC) and a 1 selects
ITU-R.BT470 “analog” standard for active video duration
(710 pixels NTSC, 702 pixels PAL).
Chrominance Control (MR24)
This bit enables the color information to be switched on and off
the video output.
Burst Control (MR25)
This bit enables the burst information to be switched on and off
the video output.
RGB/YUV Control (MR26)
This bit enables the output from the RGB DACs to be set to
YUV output video standard. Bit MR06 of Mode Register 0 must
be set to Logic 1 before MR26 is set.
Table 12. DAC Output Configuration Matrix
MR06
MR26
DAC A
DAC B
DAC C
0
CVBS
Y
C
0
1
CVBS
Y
C
1
0
B
G
R
1
U
Y
V
In Table 12,
CVBS:
Composite video baseband signal
Y:
Luminance component signal, YUV or Y/C mode
C:
Chrominance signal, for Y/C mode
U:
Chrominance component signal, for YUV mode
V:
Chrominance component signal, for YUV mode
R:
Red component video, for RGB mode
G:
Green component video, for RGB mode
B:
Blue component video, for RGB mode
Low Power Control (MR27)
This bit enables the lower power mode of the ADV7177 and the
ADV7178. This reduces DAC current by 50%.
NTSC PEDESTAL REGISTERS 3–0
PCE15–0, PCO15–0
(Subaddress [SR4–SR0] = 11–0EH)
These 8-bit-wide registers set up the NTSC pedestal on a line-
by-line basis in the vertical blanking interval for both odd and
even fields. Figure 40 show the four control registers. A Logic 1
in any of the bits of these registers has the effect of turning the
pedestal off on the equivalent line when used in NTSC.
FIELD 1/3
PCO6
PCO5
PCO3
PCO1
PCO4
PCO2
PCO0
PCO7
LINE 17 LINE 16 LINE 15 LINE 14 LINE 13 LINE 12 LINE 11 LINE 10
PCO14 PCO13
PCO11
PCO9
PCO12
PCO10
PCO8
PCO15
LINE 25 LINE 24 LINE 23 LINE 22 LINE 21 LINE 20 LINE 19 LINE 18
FIELD 1/3
FIELD 2/4
PCE6
PCE5
PCE3
PCE1
PCE4
PCE2
PCE0
PCE7
LINE 17 LINE 16 LINE 15 LINE 14 LINE 13 LINE 12 LINE 11 LINE 10
PCE14 PCE13
PCE11
PCE9
PCE12
PCE10
PCE8
PCE15
LINE 25 LINE 24 LINE 23 LINE 22 LINE 21 LINE 20 LINE 19 LINE 18
FIELD 2/4
00228-040
Figure 40. Pedestal Control Registers
MODE REGISTER 3 MR3 (MR37–MR30)
Address [SR4–SR0] = 12H
Mode Register 3 is an 8-bit-wide register. Figure 41shows the
various operations under the control of Mode Register 3.
MR3 BIT DESCRIPTION
Revision Code (MR30)
This bit is read only and indicates the revision of the device.
VBI_Pass-Through (MR31)
This bit determines whether or not data in the vertical blanking
interval (VBI) is output to the analog outputs or blanked. VBI
data insertion is not available in Slave Mode 0. Also, if BLANK
input control (TR03) is enabled, and VBI_Pass-Through is
enabled, TR03 has priority, that is, VBI data insertion does
not work.
Clock Output (MR33–MR32)
These bits control the synchronous clock output signal. The
clock can be 27 MHz, 13.5 MHz, or disabled, depending on the
values of these bit.
OSD Enable (MR35)
A Logic 1 in MR35 enables the OSD function on the ADV7177.
Input Default Color (MR36)
This bit determines the default output color from the DACs for
zero input data (or disconnected). A Logic 0 means that the
color corresponding to 00000000 is displayed. A Logic 1 forces
the output color to black for 00000000 input video data.
Reserved (MR37)
Zero should be written to this bit.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7178 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7178KS | 制造商:Analog Devices 功能描述: |
| ADV7178KS-REEL | 制造商:Analog Devices 功能描述: |
| ADV7179 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Chip Scale PAL/NTSC Video Encoder with Advanced Power Management |
| ADV7179BCP | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 10-Bit 40-Pin LFCSP EP 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
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