參數(shù)資料
型號： ADV7171KSZ-REEL
廠商： Analog Devices Inc
文件頁數(shù)： 25/64頁
文件大?。?/td> 0K
描述： IC DAC VIDEO ENC NTSC 44-MQFP
產(chǎn)品變化通告： Product Discontinuance 27/Oct/2011
標(biāo)準(zhǔn)包裝： 800
類型： 視頻編碼器
應(yīng)用： 機頂盒，視頻播放器
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
安裝類型： 表面貼裝
封裝/外殼： 44-QFP
供應(yīng)商設(shè)備封裝： 44-MQFP（10x10）
包裝： 帶卷 (TR)
ADV7170/ADV7171
Rev. C | Page 31 of 64
MR11
MR10
MR17
MR12
MR13
MR15
MR16
MR14
CLOSED CAPTIONING
FIELD SELECTION
0
NO DATA OUT
0
1
ODD FIELD ONLY
1
0
EVEN FIELD ONLY
1
DATA OUT
(BOTH FIELDS)
MR12 MR11
DAC A
CONTROL
0
NORMAL
1
POWER-DOWN
MR16
DAC D
CONTROL
MR14
DAC C
CONTROL
MR13
MR15
INTERLACE
CONTROL
0
INTERLACED
1
NONINTERLACED
MR10
COLOR BAR
CONTROL
0
DISABLE
1
ENABLE
MR17
0
NORMAL
1
POWER-DOWN
0
NORMAL
1
POWER-DOWN
0
NORMAL
1
POWER-DOWN
DAC B
CONTROL
00221-039
Figure 39. Mode Register 1
MR21
MR27
MR22
MR23
MR26
MR25
MR24
MR20
CHROMINANCE
CONTROL
0
ENABLE COLOR
1
DISABLE COLOR
MR24
GENLOCK CONTROL
x
0
DISABLE GENLOCK
0
1
ENABLE SUBCARRIER
RESET PIN
1
ENABLE RTC PIN
MR22 MR21
LOW POWER MODE
0
DISABLE
1
ENABLE
MR26
SQUARE PIXEL
CONTROL
0
DISABLE
1
ENABLE
MR20
BURST
CONTROL
0
ENABLE BURST
1
DISABLE BURST
MR25
MR27
ACTIVE VIDEO LINE
DURATION
0
720 PIXELS
1
710 PIXELS/702 PIXELS
MR23
RESERVED
00221-040
Figure 40. Mode Register 2
MR31
MR30
MR37
MR32
MR34
MR33
MR35
MR36
MR30
MR31
RESERVED
VBI_OPEN
0
DISABLE
1
ENABLE
MR32
DAC OUTPUT
0
COMPOSITE
1
GREEN/LUMA/Y
MR33
DAC A
BLUE/COMP/U
DAC B
RED/CHROMA/V
DAC C
GREEN/LUMA/Y
COMPOSITE
DAC D
CHROMA OUTPUT
SELECT
0
DISABLE
1
ENABLE
MR34
TELETEXT
ENABLE
0
DISABLE
1
ENABLE
MR35
TTXRQ BIT
MODE CONTROL
0
NORMAL
1
BIT REQUEST
MR36
INPUT DEFAULT
COLOR
0
DISABLE
1
ENABLE
MR37
00221-041
Figure 41. Mode Register 3
Genlock Control (MR22 to MR21)
These bits control the genlock feature of the ADV7170/
ADV7171. Setting MR21 to a Logic Level 1 configures the
SCRESET/RTC pin as an input. Setting MR22 to Logic Level 0
configures the SCRESET/RTC pin as a subcarrier reset input.
Therefore, the subcarrier resets to Field 0 following a low-to-
high transition on the SCRESET/RTC pin. Setting MR22 to
Logic Level 1 configures the SCRESET/RTC pin as a real-time
control input.
Active Video Line Duration (MR23)
This bit switches between two active video line durations.
A 0 selects CCIR REC601 (720 pixels PAL/NTSC), and
a 1 selects ITU-R.BT470 standard for active video duration
(710 pixels NTSC; 702 pixels PAL).
Chrominance Control (MR24)
This bit enables the color information to be switched on and off
the video output.
Burst Control (MR25)
This bit enables the burst information to be switched on and off the
video output.
Low Power Mode (MR26)
This bit enables the lower power mode of the ADV7170/
ADV7171, reducing the DAC current by 45%.
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ADV7172KST-REEL 制造商:Analog Devices 功能描述:
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