參數(shù)資料
型號： ADUC7039BCP6Z-RL
廠商： Analog Devices Inc
文件頁數(shù)： 30/92頁
文件大?。?/td> 0K
描述： IC MCU ARM7 BATT SENSER 32LFCSP
標(biāo)準(zhǔn)包裝： 2,500
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI
外圍設(shè)備： POR，溫度傳感器，WDT
輸入/輸出數(shù)： 6
程序存儲器容量： 64KB（32K x 16）
程序存儲器類型： 閃存
RAM 容量： 1K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 115°C
封裝/外殼： 32-VFQFN 裸露焊盤，CSP
包裝： 帶卷 (TR)
ADuC7039
Data Sheet
Rev. D | Page 36 of 92
Current Channel ADC Control Register
Name:
ADC0CON
Address:
0xFFFF050C
Default Value:
0x0002
Access:
Read/write
Function:
The current channel ADC control MMR is a 16-bit register that is used to configure the I-ADC.
Note:
If the current ADC is reconfigured via ADC0CON, the voltage/temperature ADC is also reset.
Table 29. ADC0CON MMR Bit Designations
Bit
Description
15
Current channel ADC enable.
This bit is set by user code to enable the I-ADC.
This bit is cleared by user code power-down the I-ADC and resets the respective ADC ready bit in the ADCSTA MMR to 0.
14 to 13
IIN current source enable.
00 = current sources off.
01 = enables 50 μA current source on IIN+.
10 = enables 50 μA current source on IIN.
11 = enables 50 μA current source on both IIN and IIN+.
12 to 10
Not used. These bits are reserved for future functionality and should be written as zero.
9
Current channel ADC output coding.
This bit is set by user code to configure I-ADC output coding as unipolar.
This bit is cleared by user code to configure I-ADC output coding as twos complement.
8
Not used. This bit is reserved for future functionality and should be written as zero.
7 to 6
Current channel ADC input select.
00 = IIN+, IIN.
01 = IIN, IIN = diagnostic, internal short configuration.
10 = VREF/136, 0 V, diagnostic, test voltage for gain settings <512. If the (REG_AVDD, AGND) divided-by-two reference is selected,
REG_AVDD is used instead of VREF with this I-ADC input selection. This leads to ADC0DAT scaled by two.
11 = not defined.
5
Reserved.
4
Current channel ADC reference select.
0 = internal, 1.2 V precision reference selected.
1 = (REG_AVDD, AGND) divided-by-two selected.
3 to 0
Current channel ADC gain select. Note: nominal I-ADC full-scale input voltage = (VREF/gain).
0001 = I-ADC gain of 2. This setting is tested for functionality only; therefore, it does not appear in the electrical specifications.
0010 = I-ADC gain of 4.
0011 = I-ADC gain of 8.
0100 = I-ADC gain of 16.
0101 = I-ADC gain of 32.
0110 = I-ADC gain of 64.
0111 = I-ADC gain of 128.
1000 = I-ADC gain of 256.
1001 = I-ADC gain of 512.
Other = I-ADC gain is undefined.
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