參數(shù)資料
型號(hào): ADUC7039BCP6Z-RL
廠商: Analog Devices Inc
文件頁(yè)數(shù): 24/92頁(yè)
文件大?。?/td> 0K
描述: IC MCU ARM7 BATT SENSER 32LFCSP
標(biāo)準(zhǔn)包裝: 2,500
系列: MicroConverter® ADuC7xxx
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 20.48MHz
連通性: LIN,SPI
外圍設(shè)備: POR,溫度傳感器,WDT
輸入/輸出數(shù): 6
程序存儲(chǔ)器容量: 64KB(32K x 16)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 32
電壓 - 電源 (Vcc/Vdd): 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 2x16b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 115°C
封裝/外殼: 32-VFQFN 裸露焊盤,CSP
包裝: 帶卷 (TR)
ADuC7039
Data Sheet
Rev. D | Page 30 of 92
16-BIT, SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTERS
The ADuC7039 incorporates two independent sigma-delta
(Σ-Δ) analog-to-digital converters (ADCs) namely, the current
channel ADC (I-ADC), and the voltage/temperature channel
ADC (V/T-ADC). These precision measurement channels
integrate attenuator, on-chip buffering, a programmable gain
amplifier, 16-bit, Σ-Δ modulators, and digital filtering for
precise measurement of current, voltage, and temperature
variables in 12 V automotive battery systems.
Current Channel ADC (I-ADC)
The I-ADC converts battery current sensed through an external
100 μ shunt resistor. On-chip programmable gain means that
the I-ADC can be configured to accommodate battery current
levels from up to ±1500 A.
As shown in Figure 11, the I-ADC employs a Σ-Δ conversion
technique to realize 16 bits of no missing codes performance.
The Σ-Δ modulator converts the sampled input signal into a
digital pulse train whose duty cycle contains the digital infor-
mation. A modified sinc3, programmable, low-pass filter is then
employed to decimate the modulator output data stream to give
a valid 16-bit data conversion result at programmable output
rates from 10 Hz to 1 kHz in normal and low power mode.
The I-ADC also incorporates a counter, comparator, and
accumulator logic. This allows the I-ADC result to generate an
interrupt after a predefined number of conversions have elapsed
or if the I-ADC result exceeds a programmable threshold value.
Once enabled, a 32-bit accumulator automatically sums the
16-bit I-ADC results.
The time to a first valid (fully settled) result on the current
channel is three ADC conversion cycles with chop mode turned
off and two ADC conversion cycles with chop mode turned on.
An interrupt can be generated even on unsettled ADC samples
by enabling the ADC continuous interrupt option.
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