- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄1900 > ADUC7032BSTZ-8V-RL (Analog Devices Inc)IC BATTERY SENSOR PREC 48-LQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | ADUC7032BSTZ-8V-RL |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 51/128頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC BATTERY SENSOR PREC 48-LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | MicroConverter® ADuC7xxx |
| 核心處理器： | ARM7 |
| 芯體尺寸： | 16/32-位 |
| 速度： | 20.48MHz |
| 連通性： | LIN，SPI，UART/USART |
| 外圍設(shè)備： | POR，PSM，溫度傳感器，WDT |
| 輸入/輸出數(shù)： | 9 |
| 程序存儲(chǔ)器容量： | 96KB（48K x 16） |
| 程序存儲(chǔ)器類(lèi)型： | 閃存 |
| RAM 容量： | 1.5K x 32 |
| 電壓 - 電源 (Vcc/Vdd)： | 3.5 V ~ 18 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 2x16b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 105°C |
| 封裝/外殼： | 48-LQFP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱(chēng)： | ADUC7032BSTZ-8V-RLDKR |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)當(dāng)前第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 29 of 128
Remap
The ARM exception vectors are all situated at the bottom of the
memory
array,
from
address
0x00000000
to
address
0x00000020.
By default, after a reset, the Flash/EE memory is logically
mapped to address 0x00000000.
It is possible to logically REMAP the SRAM to address
0x00000000. This is done by a setting bit zero of the SYSMAP0
MMR, which is located at 0xFFFF0220. To revert Flash/EE to
0x00000000, bit zero of SYSMAP0 is cleared.
It may be desirable to remap RAM to 0x00000000 to optimize
the interrupt latency of the ADuC7032, as code may be run in
full 32bit ARM mode and at the maximum core speed. It should
be noted that when an exception occurs, the core will default to
ARM mode.
Remap operation
When a reset occurs on the ADuC7032, execution starts
automatically in the factory programmed internal configuration
code. This so called kernel is hidden and cannot be accessed by
user code. If the ADuC7032 is in normal mode, it will execute
the power-on configuration routine of the kernel and then jump
to the reset vector address, 0x00000000, to execute the users
reset exception routine.
Because the Flash/EE is mirrored at the bottom of the memory
array at reset, the reset routine must always be written in
Flash/EE.
Precaution must be taken to execute the REMAP command
from the absolute Flash/EE address, and not from the mirrored,
remapped segment of memory, as this will be replaced by the
SRAM. If a remap operation is executed whilst operating code
from the mirrored location, Prefetch/Data aborts may occur or
the user may observe abnormal program operation.
This operation is reversible: the Flash/EE memory may be
remapped at address 0x00000000 by clearing bit zero of the
SYSMAP0 MMR. Precaution must again be taken to execute the
remap function from outside the mirrored area.
Any kind of reset will logically remap the Flash/EE memory to
the bottom of the memory array.
SYSMAP0 Register :
Name :
SYSMAP0
Address :
0xFFFF0220
Default Value :
0x00
Access :
Read/Write Access
Function :
This 8-bit register allows user code to remap either RAM or Flash/EE memory space into the bottom of the ARM
memory
space starting at location 0x00000000.
Table 8: SYSMAP0 MMR Bit Designations
Bit
Description
7-1
Reserved
These bits are reserved and should be written as 0 by user code
0
Remap Bit.
Set by the user to remap the SRAM to 0x00000000.
Cleared automatically after reset to remap the Flash/EE memory to 0x00000000.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADUC7034BCPZ | IC MCU FLASH 32K ANLG IO 48LFCSP |
| ADUC7036CCPZ | IC MCU 96K FLASH DUAL 48LFCSP |
| ADUC7039BCP6Z-RL | IC MCU ARM7 BATT SENSER 32LFCSP |
| ADUC7061BCPZ32 | IC MCU 16/32BIT 32KB 32LFCSP |
| ADUC7121BBCZ-RL | PRECISION ANALOG MCU I.C |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADUC7033 | 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Integrated Precision Battery Sensor For Automotive |
| ADUC7033BCPZ-8L | 制造商:Analog Devices 功能描述:Integrated Precision Battery Sensor 48-Pin LFCSP EP 制造商:Analog Devices 功能描述:INTEGRATED PRECISION BATTERY SENSOR 48LFCSP EP - Trays |
| ADUC7033BCPZ-8L-RL | 制造商:Analog Devices 功能描述:INTEGRATED PRECISION BATTERY SENSOR 48LFCSP EP - Tape and Reel |
| ADUC7033BSTZ-88 | 功能描述:IC BATT SENSOR PREC 48LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 電池管理 系列:- 標(biāo)準(zhǔn)包裝:2,000 系列:Impedance Track™ 功能:燃料，電量檢測(cè)計(jì)/監(jiān)控器 電池化學(xué):鋰離子（Li-Ion） 電源電壓:2.4 V ~ 2.6 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:帶卷 (TR) 產(chǎn)品目錄頁(yè)面:1020 (CN2011-ZH PDF) 配用:BQ27350EVM-ND - BQ27350EVM 其它名稱(chēng):296-21665-2 |
| ADUC7033BSTZ-88-RL | 功能描述:IC BATT SENSOR PREC 48LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> PMIC - 電池管理 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 功能:電池監(jiān)控器 電池化學(xué):堿性，鋰離子，鎳鎘，鎳金屬氫化物 電源電壓:1 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:SOT-23-6 供應(yīng)商設(shè)備封裝:SOT-6 包裝:帶卷 (TR) |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。