參數(shù)資料
型號： ADUC7032BSTZ-8V-RL
廠商： Analog Devices Inc
文件頁數(shù)： 25/128頁
文件大?。?/td> 0K
描述： IC BATTERY SENSOR PREC 48-LQFP
標準包裝： 1
系列： MicroConverter® ADuC7xxx
核心處理器： ARM7
芯體尺寸： 16/32-位
速度： 20.48MHz
連通性： LIN，SPI，UART/USART
外圍設備： POR，PSM，溫度傳感器，WDT
輸入/輸出數(shù)： 9
程序存儲器容量： 96KB（48K x 16）
程序存儲器類型： 閃存
RAM 容量： 1.5K x 32
電壓 - 電源 (Vcc/Vdd)： 3.5 V ~ 18 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 2x16b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 105°C
封裝/外殼： 48-LQFP
包裝： 標準包裝
其它名稱： ADUC7032BSTZ-8V-RLDKR
Preliminary Technical Data
ADuC7032
Rev. PrD | Page 120 of 128
LIN Frame Break Symbol
As shown in Figure 40, the LIN “break” symbol is used to signal
the start of a new frame. It lasts at least 13 bit periods and a
slave must be able to detect a “break” symbol, even if it expects
data or is in the process of receiving data. The ADuC7032
accomplishes this by using the LHSVAL1 Break Condition and
Break Error detect functionality as described earlier. The
“break” period does not have to be accurately measured, but if a
bus fault condition (bus held low) occurs it must be flagged.
05
99
4-
04
3
TBREAK > 13TBIT
BREAK
DELIMIT
START
BIT
Figure 40 : LIN Break Field
LIN Frame Synchronization Byte
The baud rate of the communication via LIN is calculated from
the SYNC Byte. This can be seen in Figure 41. The time
between the first falling edge of the Sync Field and the fifth
falling edge of the Sync Field is measured. This is then divided
by eight to give the baud rate of the data that will be
transmitted. The ADuC7032 implements the timing of this
Sync byte in hardware. For more information on this feature,
please refer to LIN Hardware Synchronization.
05
99
4-
04
4
TBIT
STOP
BIT
START
BIT
Figure 41 : LIN Synch byte Field
LIN Frame Protected Identifier
After receiving the LIN synch field, the required baud rate for
the UART is calculated. The UART is then configured, which
allows the ADuC7032 to receive the Protected Identifier, as
shown in Figure 42. The Protected Identifier consists of two
sub-fields, the identifier and the identifier parity. The six bit
identifier contains the identifier of the target for the frame. The
identifier signifies the number of data bytes to be either
received or transmitted. The number of bytes is user
configurable at system level design. The parity is calculated on
the identifier, and is dependent on the revision of LIN the
system is designed for.
05
99
4-
04
5
ID1
ID0
START
BIT
STOP
BIT
TBIT
ID2
ID3
ID4
ID5
P0
P1
Figure 42 : LIN Identifier Byte Field
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