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參數(shù)資料
| 型號(hào)： | AD9260AS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | High-Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate |
| 中文描述： | 1-CH 16-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP44 |
| 封裝： | MS-022AB, MQFP-44 |
| 文件頁(yè)數(shù)： | 20/36頁(yè) |
| 文件大?。?/td> | 572K |
| 代理商： | AD9260AS |
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AD9260
–20–
REV. B
THEORY OF OPERATION
The AD9260 utilizes a new analog-to-digital converter architec-
ture to combine sigma-delta techniques with a high-speed,
pipelined A/D converter. This topology allows the AD9260 to
offer the high dynamic range associated with sigma-delta con-
verters while maintaining very wide input signal bandwidth
(1.25 MHz) at a very modest 8
×
oversampling ratio. Figure 53
provides a block diagram of the AD9260. The differential
analog input is fed into a second order, multibit sigma-delta
modulator. This modulator features a 5-bit flash quantizer and
5-bit feedback. In addition, a 12-bit pipelined A/D quantizes
the input to the 5-bit flash to greater accuracy. A special digital
modulation loop combines the output of the 12-bit pipelined
A/D with the delayed output of the 5-bit flash to produce the
equivalent response of a second order loop with a 12-bit
quantizer and 12-bit feedback. The combination of a second
order loop and multibit feedback provides inherent stability:
the AD9260 is not prone to idle tones or full-scale idiosyncra-
cies sometimes associated with higher order single bit sigma-
delta modulators.
The output of this 12-bit modulator is fed into the digital deci-
mation filter. The voltage level on the MODE pin establishes
the configuration for the digital filter. The user may bring the
data out undecimated (at the clock rate), or at a decimation
factor of 2
×
, 4
×
, or a full 8
×
. The spectra for these four cases
are shown in Figures 5, 6, 7 and 8, all for a 100 kHz full-scale
input and 20 MHz clock. The spectra of the undecimated
output clearly shows the second order shaping characteristic of
the quantization noise as it rises at frequencies above 1.25 MHz.
The on-chip decimation filter provides excellent stopband rejec-
tion to suppress any stray input signal between 1.25 MHz and
18.75 MHz, substantially easing the requirements on any anti-
aliasing filter for the analog input path. The decimation filters
are integrated with symmetric FIR filter structures, providing a
linear phase response and excellent passband flatness.
The digital output driver register of the AD9260 features both
READ and CHIP SELECT pins to allow easy interfacing. The
digital supply of the AD9260 is designed to operate over a
2.7 V to 5.25 V supply range, though 3 V supplies are recom-
mended to minimize digital noise on the board. A DATA
AVAILABLE pin allows the user to easily synchronize to the
converter
’
s decimated output data rate. OUT-OF-RANGE
(OTR) indication is given for an overflow in the pipelined A/D
converter or digital filters. A RESETB function is provided to
synchronize the converter
’
s decimated data and clear any over-
flow condition in the analog integrators.
An on-chip reference and reference buffer are included on the
AD9260. The reference can be configured in either a 2.5 V
mode (providing a 4 V pk-pk differential input full scale), a 1 V
mode (providing a 1.6 V pk-pk differential input full scale), or
programmed with an external resistor divider to provide any
voltage level between 1 V and 2.5 V.
However, optimum noise and
distortion performance for the AD9260 can only be achieved with a
2.5 V reference as shown in Figure 46
.
For users wishing to operate the part at reduced clock frequen-
cies, the bias current of the AD9260 is designed to be scalable.
This scaling is accomplished through use of the proper external
resistor tied to the BIAS pin: the power can be reduced roughly
proportionately to clock frequency by as much as 75% (for clock
rates of 5 MHz). Refer to Figures 41
–
43 and 47
–
51 for charac-
terization curves showing performance tradeoffs.
ANALOG INPUT AND REFERENCE OVERVIEW
Figure 54, a simplified model of the AD9260, highlights the
relationship between the analog inputs, VINA, VINB and the
reference voltage VREF. Like the voltage applied to the top of
the resistor ladder in a flash A/D converter, the value VREF
defines the maximum input voltage to the A/D converter. An
internal reference buffer in the AD9260 scales the reference
voltage VREF before it is applied internally to the AD9260
LSB
DIFFERENTIATOR
V
IN
INT1
+
–
5B
DAC1
+
–
5B
DAC2
5B
ADC
INT2
5B
DAC
+
–
16
3B
ADC
3B
DAC
+
–
4
3B
ADC
3B
DAC
+
–
4
4B
ADC
PIPELINE CORRECTION LOGIC
8 LSBs
+ +
C
OUT
HALF-BAND
DECIMATION FILTER STAGE 1
HALF-BAND
DECIMATION FILTER STAGE 2
HALF-BAND
DECIMATION FILTER STAGE 3
Z
–
D
SHUFFLE
M
OUT
CONTROL/TEST
LOGIC
BANDGAP
REFERENCE
REFERENCE
BUFFER
OUTPUT BITS
Figure 53. Simplified Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9260EB | High-Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate |
| AD9280ARSRL | Complete 8-Bit, 32 MSPS, 95 mW CMOS A/D Converter |
| AD9280 | Complete 8-Bit, 32 MSPS, 95 mW CMOS A/D Converter |
| AD9280-EB | Complete 8-Bit, 32 MSPS, 95 mW CMOS A/D Converter |
| AD9280ARS | Complete 8-Bit, 32 MSPS, 95 mW CMOS A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9260ASRL | 制造商:Analog Devices 功能描述:ADC Single Pipelined 2.5Msps 16-bit Parallel 44-Pin MQFP T/R 制造商:Rochester Electronics LLC 功能描述:16-BIT HIGH SPEED OVERSAMPLED ADC - Bulk |
| AD9260ASZ | 功能描述:IC ADC CMOS 16BIT OVRSAMP 44MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁(yè)面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD9260ASZRL | 功能描述:IC ADC 16BIT 2.5MHZ 44MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD9260EB | 制造商:AD 制造商全稱:Analog Devices 功能描述:High-Speed Oversampling CMOS ADC with 16-Bit Resolution at a 2.5 MHz Output Word Rate |
| AD9260-EB | 制造商:Analog Devices 功能描述:Evaluation Board For AD9260 制造商:Analog Devices 功能描述:DEV TOOLS, EVAL BD FOR AD9260 - Bulk |
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