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參數(shù)資料
| 型號： | AD7998BRUZ-13 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 串行ADC |
| 英文描述： | 8-Channel, 10- and 12-Bit ADCs with I2CCompatible |
| 中文描述： | 8通道，10 -和12位ADC與I2CCompatible |
| 文件頁數(shù)： | 26/32頁 |
| 文件大小： | 1056K |
| 代理商： | AD7998BRUZ-13 |
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AD7997/AD7998
READING DATA FROM THE AD7997/AD7998
Reading data from the AD7997/AD7998 is a 1- or 2-byte
operation. Reading back the contents of the alert status register
or the cycle timer register is a single-byte read operation, as
shown in Figure 29. This assumes the particular register address
has previously been set up by a single-byte write operation to
the address pointer register, as shown in Figure 26. Once the
register address has been set up, any number of reads can be
performed from that particular register without having to write
to the address pointer register again.
Rev. 0 | Page 26 of 32
If a read from a different register is required, the relevant
register address has to be written to the address pointer register,
and again any number of reads from this register may then be
performed.
Reading data from the configuration register, conversion result
register, DATA
HIGH
registers, DATA
LOW
registers, or hysteresis
registers is a 2-byte operation, as shown in Figure 30. The same
rules apply for a 2-byte read as a single-byte read.
When reading data back from a register, for example the
conversion result register, if more than two read bytes are
supplied, the same or new data is read from the AD7997/
AD7998 without the need to readdress the device. This allows
the master to continuously read from a data register without
having to readdress the AD7997/AD7998.
SDA
1
1
9
9
D7
D6
D5
D2
D1
D0
R/W
A0
A1
A2
A3
0
1
SCL
D4
D3
0
0
START BY
MASTER
ACK. BY
AD7997/AD7998
NO ACK. BY
MASTER
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
SINGLE DATA BYTE FROM AD7997/AD7998
Figure 29. Reading a Single Byte of Data from a Selected Register
9
SDA
1
1
9
ALERT
FLAG
CHID2
D10
D9
D8
A0
A1
A2
A3
0
0
SCL
1
D11
1
D7
D6
D5
D2
D1/0
D0/0
D4
D3
SCL (CONTINUED)
SDA (CONTINUED)
CH
ID1
CH
ID0
R/W
0
9
START BY
MASTER
ACK. BY
AD7997/AD7998
NO ACK. BY
MASTER
ACK. BY
MASTER
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
MOST SIGNIFICANT DATA BYTE FROM
AD7997/AD7998
FRAME 2
MOST SIGNIFICANT DATA BYTE FROM
AD7997/AD7998
Figure 30. Reading Two Bytes of Data from the Conversion Result Register
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| AD7999 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 12-/10-/8-Bit ADC with I2C-Compatible Interface in 8-Lead SOT-23 |
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