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參數(shù)資料
| 型號(hào)： | AD7998BRUZ-13 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 串行ADC |
| 英文描述： | 8-Channel, 10- and 12-Bit ADCs with I2CCompatible |
| 中文描述： | 8通道，10 -和12位ADC與I2CCompatible |
| 文件頁(yè)數(shù)： | 24/32頁(yè) |
| 文件大?。?/td> | 1056K |
| 代理商： | AD7998BRUZ-13 |
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AD7997/AD7998
WRITING TO THE AD7997/AD7998
Depending on the register being written to, there are three
different writes for the AD7997/AD7998.
Rev. 0 | Page 24 of 32
WRITING TO THE ADDRESS POINTER REGISTER
FOR A SUBSEQUENT READ
In order to read from a particular register, the address pointer
register must first contain the address of that register. If it does
not, the correct address must be written to the address pointer
register by performing a single-byte write operation, as shown
in Figure 26. The write operation consists of the serial bus
address followed by the address pointer byte. No data is written
to any of the data registers. A read operation may be subsequently
performed to read the register of interest.
WRITING A SINGLE BYTE OF DATA TO THE ALERT
STATUS REGISTER OR CYCLE REGISTER
The alert status register and cycle register are both 8-bit registers,
so only one byte of data can be written to each. Writing a single
byte of data to one of these registers consists of the serial bus
write address, the chosen data register address written to the
address pointer register, followed by the data byte written to the
selected data register. See Figure 27.
WRITING TWO BYTES OF DATA TO A LIMIT,
HYSTERESIS, OR CONFIGURATION REGISTER
Each of the four limit registers are 16-bit registers, so two bytes
of data are required to write a value to any one of them. Writing
two bytes of data to one of these registers consists of the serial
bus write address, the chosen limit register address written to
the address pointer register, followed by two data bytes written
to the selected data register. See Figure 28.
If the master is write addressing the AD7997/AD7998, it can
write to more than one register without readdressing the ADC.
After the first write operation has completed for the first data
register, during the next byte the master simply writes to the
address pointer byte to select the next data register for a write
operation. This eliminates the need to readdress the device in
order to write to another data register.
SDA
START BY
MASTER
ACK. BY
AD7997/AD7998
ACK. BY
AD7997/AD7998
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
1
9
1
9
C4
C3
C2
P2
P1
P0
A0
A1
A2
A3
0
0
SCL
1
C1
P3
0
R/W
Figure 26. Writing to the Address Pointer Register to Select a Register for a Subsequent Read Operation
SDA
ACK.BY
AD7997/AD7998
1
1
9
9
C4
C3
C2
P2
P1
P0
R/W
A0
A1
A2
A3
0
0
SCL
1
C1
P3
9
1
9
D7
D6
D5
D2
D1
D0
D4
D3
FRAME 3
DATA BYTE
SCL (CONTINUED)
SDA (CONTINUED)
0
START BY
MASTER
ACK. BY
AD7997/AD7998
ACK. BY
AD7997/AD7998
STOP BY
MASTER
FRAME 1
SERIAL BUS ADDRESS BYTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
Figure 27. Single-Byte Write Sequence
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| AD7998BRUZ-1REEL3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:8-Channel, 10- and 12-Bit ADCs with I2CCompatible |
| AD7999 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, 12-/10-/8-Bit ADC with I2C-Compatible Interface in 8-Lead SOT-23 |
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