參數(shù)資料
型號(hào): 72V3684L15PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: FIFO
英文描述: 16K X 36 BI-DIRECTIONAL FIFO, 10 ns, PQFP128
封裝: TQFP-128
文件頁(yè)數(shù): 11/36頁(yè)
文件大?。?/td> 418K
代理商: 72V3684L15PF
COMMERCIALTEMPERATURERANGE
IDT72V3684/72V3694/72V36104 3.3V CMOS SyncBiFIFOTM WITH
BUS-MATCHING 16,384 x 36 x 2, 32,768 x 36 x 2, 65 and 536 x 36 x 2
19
NOTE:
1. Written to FIFO1.
Figure 7. Port A Write Cycle Timing for FIFO1 (IDT Standard and FWFT Modes)
DATA SIZE TABLE FOR LONG-WORD WRITES TO FIFO2
Figure 8. Port B Long-Word Write Cycle Timing for FIFO2 (IDT Standard and FWFT Modes)
SIZE MODE(1)
DATA WRITTEN TO FIFO2
DATA READ FROM FIFO2
BM
SIZE
BE
B35-B27
B26-B18
B17-B9
B8-B0
A35-A27
A26-A18
A17-A9
A8-A0
LX
X
A
B
C
D
A
B
C
D
NOTE:
1. BE is selected at Master Reset: BM and SIZE must be static throughout device operation.
NOTE:
1. Written to FIFO2.
4677 drw09
CLKA
FFA/IRA
ENA
A0 - A35
MBA
CSA
W/
RA
tCLKH
tCLKL
tCLK
tENS1
tENS2
tDS
tENH
tDH
W1(1)
W2 (1)
tENS2
tENH
tENS2
No Operation
HIGH
4677 drw10
CLKB
FFB/IRB
ENB
B0-B35
MBB
CSB
W/RB
tCLK
tCLKH
tCLKL
tENH
tDH
W1(1)
W2(1)
tENS2
tDS
tENS2
tENS1
tENH
tENS2
No Operation
HIGH
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