參數(shù)資料
型號: 7007L35PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: SRAM
英文描述: 32K X 8 DUAL-PORT SRAM, 35 ns, PQFP80
封裝: 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-80
文件頁數(shù): 16/21頁
文件大小: 168K
代理商: 7007L35PF
IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
4
NOTES:
1. All Vcc pins must be connected to power supply
2. All GND pins must be connected to ground.
3. Package body is approximately 1.8 in x 1.8 in x .16 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part marking.
Pin Names
Pin Configurations(1,2,3) (con't.)
2940 drw 04
51
50
48
46
44
42
40
38
36
53
55
57
59
61
63
65
67
68
66
13
579
11
13
15
20
22
24
26
28
30
32
35
IDT7007G
G68-1(4)
68-Pin PGA
Top View(5)
AB
C
D
EF
G
H
J
K
L
47
45
43
41
34
21
23
25
27
29
31
33
24
6810
12
14
16
18
19
17
56
58
60
62
64
11
10
09
08
07
06
05
04
03
02
01
52
54
49
39
37
A5L
INTL
SEML
CEL
VCC
OEL
R/
WL
I/O0L
N/C
GND
I/O0R
VCC
N/C
OER
R/
WR
SEMR
CER
GND BUSYR
BUSYL M/S
INTR
GND
A1R
INDEX
A4L
A2L
A0L
A3R
A2R
A4R
A5R
A7R
A6R
A9R
A8R
A11R
A10R
A12R
A0R
A7L
A6L
A3L
A1L
A9L
A8L
A11L
A10L
A12L
VCC
I/O2R
I/O3R I/O5R
I/O6R
I/O1R
I/O4R
I/O7R
I/O1L
I/O2L I/O4L
I/O7L
I/O3L I/O5L
I/O6L
A13R
A13L
A14R
A14L
,
11/06/01
Left Port
Right Port
Names
CEL
CER
Chip Enables
R/
WL
R/
WR
Read/Write Enable
OEL
OER
Output Enable
A0L - A14L
A0R - A14R
Address
I/O0L - I/O7L
I/O0R - I/O7R
Data Input/Output
SEML
SEMR
Semaphore Enable
INTL
INTR
Interrupt Flag
BUSYL
BUSYR
Busy Flag
M/
S
Master or Slave Select
VCC
Power
GND
Ground
2940 tbl 01
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