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參數(shù)資料
| 型號(hào)： | 7007L35PF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 32K X 8 DUAL-PORT SRAM, 35 ns, PQFP80 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, GREEN, TQFP-80 |
| 文件頁(yè)數(shù)： | 11/21頁(yè) |
| 文件大小： | 168K |
| 代理商： | 7007L35PF |
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IDT7007S/L
High-Speed 32K x 8 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
a zero into a semaphore latch and is released when the same side writes
a one to that latch.
The eight semaphore flags reside within the IDT7007 in a separate
memoryspacefromtheDual-PortRAM.This addressspaceisaccessed
by placing a LOWinput on the
SEMpin(whichactsasachipselectforthe
semaphore flags) and using the other control pins (Address,
OE, and
R/
W) as they would be used in accessing a standard Static RAM. Each
of the flags has a unique address which can be accessed by either side
through address pins A0 – A2. When accessing the semaphores, none of
the other address pins has any effect.
When writing to a semaphore, only data pin D0is used. If a LOWlevel
is written into an unused semaphore location, that flag will be set to a zero
on that side and a one on the other side (see Truth Table V). That
semaphorecannowonlybemodifiedbythesideshowingthezero.When
a one is written into the same location from the same side, the flag will be
settoaoneforbothsides(unlessasemaphorerequestfromtheotherside
is pending) and then can be written to by both sides. The fact that the side
whichisabletowriteazerointoasemaphoresubsequentlylocksoutwrites
fromtheothersideiswhatmakessemaphoreflagsusefulininterprocessor
communications.(Athoroughdiscussionontheuseofthisfeaturefollows
shortly.) A zero written into the same location from the other side will be
stored in the semaphore request latch for that side until the semaphore is
freed by the first side.
When a semaphore flag is read, its value is spread into all data bits so
that a flag that is a one reads as a one in all data bits and a flag containing
a zero reads as all zeros. The read value is latched into one side’s output
registerwhenthatside'ssemaphoreselect(
SEM)andoutputenable(OE)
signals go active. This serves to disallow the semaphore from changing
state in the middle of a read cycle due to a write cycle from the other side.
Because of this latch, a repeated read of a semaphore in a test loop must
cause either signal (
SEM or OE) to go inactive or the output will never
change.
A sequence WRITE/READ must be used by the semaphore in order
to guarantee that no system level contention will occur. A processor
requests access to shared resources by attempting to write a zero into a
semaphore location. If the semaphore is already in use, the semaphore
requestlatchwillcontainazero,yetthesemaphoreflagwillappearasone,
a fact which the processor will verify by the subsequent read (see Truth
Table V). As an example, assume a processor writes a zero to the left port
at a free semaphore location. On a subsequent read, the processor will
verifythatithaswrittensuccessfullytothatlocationandwillassumecontrol
over the resource in question. Meanwhile, if a processor on the right side
attempts to write a zero to the same semaphore flag it will fail, as will be
verified by the fact that a one will be read from that semaphore on the right
side during subsequent read. Had a sequence of READ/WRITE been
usedinstead,systemcontentionproblemscouldhaveoccurredduringthe
gap between the read and write cycles.
Itisimportanttonotethatafailedsemaphorerequestmustbefollowed
by either repeated reads or by writing a one into the same location. The
reason for this is easily understood by looking at the simple logic diagram
of the semaphore flag in Figure 4. Two semaphore request latches feed
into a semaphore flag. Whichever latch is first to present a zero to the
semaphoreflagwillforceitssideofthesemaphoreflagLOWandtheother
side HIGH. This condition will continue until a one is written to the same
semaphorerequestlatch.Shouldtheotherside’ssemaphorerequestlatch
have been written to a zero in the meantime, the semaphore flag will flip
overtotheothersideassoonasaoneiswrittenintothefirstside’srequest
latch. The second side’s flag will now stay low until its semaphore request
latchiswrittentoaone.Fromthisitiseasytounderstandthat,ifasemaphore
is requested and the processor which requested it no longer needs the
resource, the entire system can hang up until a one is written into that
semaphore request latch.
The critical case of semaphore timing is when both sides request a
single token by attempting to write a zero into it at the same time. The
semaphore logic is specially designed to resolve this problem. If simulta-
neousrequestsaremade,thelogicguaranteesthatonlyonesidereceives
the token. If one side is earlier than the other in making the request, the
first side to make the request will receive the token. If both requests arrive
at the same time, the assignment will be arbitrarily made to one port or
Figure 4. IDT7007 Semaphore Logic
the other.
One caution that should be noted when using semaphores is that
semaphores alone do not guarantee that access to a resource is secure.
Aswithanypowerfulprogrammingtechnique,ifsemaphoresaremisused
or misinterpreted, a software error can easily happen.
Initializationofthesemaphoresisnotautomaticandmustbehandled
via the initialization program at power-up. Since any semaphore request
flag which contains a zero must be reset to a one, all semaphores on both
sides should have a one written into them at initialization from both sides
to assure that they will be free when needed.
Using Semaphores—Some Examples
Perhapsthesimplestapplicationofsemaphoresistheirapplicationas
resourcemarkersfortheIDT7007’sDual-PortRAM. Saythe32Kx8RAM
was to be divided into two 16K x 8 blocks which were to be dedicated at
any one time to servicing either the left or right port. Semaphore 0 could
be used to indicate the side which would control the lower section of
memory,andSemaphore1couldbedefinedastheindicatorfortheupper
sectionofmemory.
To take a resource, in this example the lower 16K of Dual-Port RAM,
the processor on the left port could write and then read a zero in to
Semaphore 0. If this task were successfully completed (a zero was read
back rather than a one), the left processor would assume control of the
lower 16K. Meanwhile the right processor was attempting to gain control
ofthe resourceaftertheleftprocessor,itwouldreadbackaoneinresponse
to the zero it had attempted to write into Semaphore 0. At this point, the
software could choose to try and gain control of the second 16K section
bywriting,thenreadingazerointoSemaphore1.Ifitsucceededingaining
control, it would lock out the left side.
D
2940 drw 20
0
D
Q
WRITE
D0
D
Q
WRITE
SEMAPHORE
REQUEST FLIP FLOP
SEMAPHORE
REQUEST FLIP FLOP
LPORT
RPORT
SEMAPHORE
READ
SEMAPHORE
READ
,
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 7007L35PF8 | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 256K-Bit 32K x 8 35ns 80-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 256KBIT 32KX8 35NS 80TQFP - Tape and Reel |
| 7007L55J | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7007L55J8 | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7007L55PF | 功能描述:靜態(tài)隨機(jī)存取存儲(chǔ)器 RoHS:否 制造商:Cypress Semiconductor 存儲(chǔ)容量:16 Mbit 組織:1 M x 16 訪問(wèn)時(shí)間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7007L55PF8 | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 256K-Bit 32K x 8 55ns 80-Pin TQFP T/R 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 256KBIT 32KX8 55NS 80TQFP - Tape and Reel |
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